2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2015-10-27 12:08:00 +00:00
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/*
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* Copyright (C) 2015 Samsung Electronics
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* Przemyslaw Marczak <p.marczak@samsung.com>
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*/
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2021-04-27 09:02:19 +00:00
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#define LOG_CATEGORY UCLASS_ADC
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2015-10-27 12:08:00 +00:00
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#include <common.h>
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#include <errno.h>
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2018-11-12 13:03:58 +00:00
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#include <div64.h>
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2015-10-27 12:08:00 +00:00
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#include <dm.h>
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#include <dm/lists.h>
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#include <dm/device-internal.h>
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#include <dm/uclass-internal.h>
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#include <adc.h>
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2015-10-27 12:08:00 +00:00
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#include <power/regulator.h>
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2020-12-03 23:55:18 +00:00
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#define ADC_UCLASS_PLATDATA_SIZE sizeof(struct adc_uclass_plat)
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2015-10-27 12:08:00 +00:00
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#define CHECK_NUMBER true
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#define CHECK_MASK (!CHECK_NUMBER)
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/* TODO: add support for timer uclass (for early calls) */
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#ifdef CONFIG_SANDBOX_ARCH
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#define sdelay(x) udelay(x)
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#else
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extern void sdelay(unsigned long loops);
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#endif
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static int check_channel(struct udevice *dev, int value, bool number_or_mask,
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const char *caller_function)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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unsigned mask = number_or_mask ? (1 << value) : value;
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/* For the real ADC hardware, some ADC channels can be inactive.
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* For example if device has 4 analog channels, and only channels
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* 1-st and 3-rd are valid, then channel mask is: 0b1010, so request
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* with mask 0b1110 should return an error.
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*/
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if ((uc_pdata->channel_mask >= mask) && (uc_pdata->channel_mask & mask))
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return 0;
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printf("Error in %s/%s().\nWrong channel selection for device: %s\n",
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__FILE__, caller_function, dev->name);
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return -EINVAL;
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}
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static int adc_supply_enable(struct udevice *dev)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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const char *supply_type;
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int ret = 0;
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if (uc_pdata->vdd_supply) {
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supply_type = "vdd";
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ret = regulator_set_enable(uc_pdata->vdd_supply, true);
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}
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if (!ret && uc_pdata->vss_supply) {
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supply_type = "vss";
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ret = regulator_set_enable(uc_pdata->vss_supply, true);
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}
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if (ret)
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2017-09-16 05:10:41 +00:00
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pr_err("%s: can't enable %s-supply!", dev->name, supply_type);
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2015-10-27 12:08:00 +00:00
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return ret;
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}
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int adc_data_mask(struct udevice *dev, unsigned int *data_mask)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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if (!uc_pdata)
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return -ENOSYS;
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*data_mask = uc_pdata->data_mask;
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return 0;
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}
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2018-11-12 13:03:58 +00:00
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int adc_channel_mask(struct udevice *dev, unsigned int *channel_mask)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2018-11-12 13:03:58 +00:00
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if (!uc_pdata)
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return -ENOSYS;
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*channel_mask = uc_pdata->channel_mask;
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return 0;
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}
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2015-10-27 12:08:00 +00:00
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int adc_stop(struct udevice *dev)
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{
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const struct adc_ops *ops = dev_get_driver_ops(dev);
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if (!ops->stop)
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return -ENOSYS;
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return ops->stop(dev);
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}
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int adc_start_channel(struct udevice *dev, int channel)
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{
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const struct adc_ops *ops = dev_get_driver_ops(dev);
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int ret;
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if (!ops->start_channel)
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return -ENOSYS;
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ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
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if (ret)
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return ret;
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ret = adc_supply_enable(dev);
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if (ret)
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return ret;
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return ops->start_channel(dev, channel);
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}
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int adc_start_channels(struct udevice *dev, unsigned int channel_mask)
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{
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const struct adc_ops *ops = dev_get_driver_ops(dev);
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int ret;
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if (!ops->start_channels)
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return -ENOSYS;
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ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
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if (ret)
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return ret;
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ret = adc_supply_enable(dev);
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if (ret)
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return ret;
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return ops->start_channels(dev, channel_mask);
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}
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int adc_channel_data(struct udevice *dev, int channel, unsigned int *data)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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const struct adc_ops *ops = dev_get_driver_ops(dev);
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unsigned int timeout_us = uc_pdata->data_timeout_us;
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int ret;
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if (!ops->channel_data)
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return -ENOSYS;
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ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
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if (ret)
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return ret;
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do {
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ret = ops->channel_data(dev, channel, data);
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if (!ret || ret != -EBUSY)
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break;
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/* TODO: use timer uclass (for early calls). */
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sdelay(5);
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} while (timeout_us--);
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return ret;
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}
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int adc_channels_data(struct udevice *dev, unsigned int channel_mask,
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struct adc_channel *channels)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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unsigned int timeout_us = uc_pdata->multidata_timeout_us;
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const struct adc_ops *ops = dev_get_driver_ops(dev);
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int ret;
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if (!ops->channels_data)
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return -ENOSYS;
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ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
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if (ret)
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return ret;
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do {
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ret = ops->channels_data(dev, channel_mask, channels);
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if (!ret || ret != -EBUSY)
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break;
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/* TODO: use timer uclass (for early calls). */
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sdelay(5);
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} while (timeout_us--);
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return ret;
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}
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int adc_channel_single_shot(const char *name, int channel, unsigned int *data)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
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if (ret)
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return ret;
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ret = adc_start_channel(dev, channel);
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if (ret)
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return ret;
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ret = adc_channel_data(dev, channel, data);
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if (ret)
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return ret;
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return 0;
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}
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static int _adc_channels_single_shot(struct udevice *dev,
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unsigned int channel_mask,
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struct adc_channel *channels)
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{
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unsigned int data;
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int channel, ret;
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for (channel = 0; channel <= ADC_MAX_CHANNEL; channel++) {
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/* Check channel bit. */
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if (!((channel_mask >> channel) & 0x1))
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continue;
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ret = adc_start_channel(dev, channel);
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if (ret)
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return ret;
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ret = adc_channel_data(dev, channel, &data);
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if (ret)
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return ret;
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channels->id = channel;
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channels->data = data;
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channels++;
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}
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return 0;
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}
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int adc_channels_single_shot(const char *name, unsigned int channel_mask,
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struct adc_channel *channels)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
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if (ret)
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return ret;
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ret = adc_start_channels(dev, channel_mask);
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if (ret)
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goto try_manual;
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ret = adc_channels_data(dev, channel_mask, channels);
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if (ret)
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return ret;
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return 0;
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try_manual:
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if (ret != -ENOSYS)
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return ret;
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return _adc_channels_single_shot(dev, channel_mask, channels);
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}
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2020-12-03 23:55:23 +00:00
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static int adc_vdd_plat_update(struct udevice *dev)
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2015-10-27 12:08:00 +00:00
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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int ret;
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/* Warning!
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* This function can't return supply device before its bind.
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* Please pay attention to proper fdt scan sequence. If ADC device
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* will bind before its supply regulator device, then the below 'get'
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* will return an error.
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*/
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2018-07-24 14:31:29 +00:00
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if (!uc_pdata->vdd_supply)
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return 0;
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2015-10-27 12:08:00 +00:00
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ret = regulator_get_value(uc_pdata->vdd_supply);
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if (ret < 0)
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return ret;
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uc_pdata->vdd_microvolts = ret;
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return 0;
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}
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2020-12-03 23:55:23 +00:00
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static int adc_vss_plat_update(struct udevice *dev)
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2015-10-27 12:08:00 +00:00
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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int ret;
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2018-07-24 14:31:29 +00:00
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if (!uc_pdata->vss_supply)
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return 0;
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2015-10-27 12:08:00 +00:00
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ret = regulator_get_value(uc_pdata->vss_supply);
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if (ret < 0)
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return ret;
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uc_pdata->vss_microvolts = ret;
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return 0;
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}
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int adc_vdd_value(struct udevice *dev, int *uV)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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int ret, value_sign = uc_pdata->vdd_polarity_negative ? -1 : 1;
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/* Update the regulator Value. */
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2020-12-03 23:55:23 +00:00
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ret = adc_vdd_plat_update(dev);
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2015-10-27 12:08:00 +00:00
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if (ret)
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return ret;
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2018-07-24 14:31:29 +00:00
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2015-10-27 12:08:00 +00:00
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if (uc_pdata->vdd_microvolts == -ENODATA)
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return -ENODATA;
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*uV = uc_pdata->vdd_microvolts * value_sign;
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return 0;
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}
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int adc_vss_value(struct udevice *dev, int *uV)
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{
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2020-12-03 23:55:18 +00:00
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struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
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2015-10-27 12:08:00 +00:00
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int ret, value_sign = uc_pdata->vss_polarity_negative ? -1 : 1;
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/* Update the regulator Value. */
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2020-12-03 23:55:23 +00:00
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ret = adc_vss_plat_update(dev);
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2015-10-27 12:08:00 +00:00
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if (ret)
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return ret;
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2018-07-24 14:31:29 +00:00
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2015-10-27 12:08:00 +00:00
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if (uc_pdata->vss_microvolts == -ENODATA)
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return -ENODATA;
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*uV = uc_pdata->vss_microvolts * value_sign;
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return 0;
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}
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2018-11-12 13:03:58 +00:00
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int adc_raw_to_uV(struct udevice *dev, unsigned int raw, int *uV)
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{
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unsigned int data_mask;
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int ret, val, vref;
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u64 raw64 = raw;
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ret = adc_vdd_value(dev, &vref);
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if (ret)
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return ret;
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if (!adc_vss_value(dev, &val))
|
|
|
|
vref -= val;
|
|
|
|
|
|
|
|
ret = adc_data_mask(dev, &data_mask);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
raw64 *= vref;
|
|
|
|
do_div(raw64, data_mask);
|
|
|
|
*uV = raw64;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-12-03 23:55:23 +00:00
|
|
|
static int adc_vdd_plat_set(struct udevice *dev)
|
2015-10-27 12:08:00 +00:00
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
|
2017-05-19 02:09:37 +00:00
|
|
|
int ret;
|
2015-10-27 12:08:00 +00:00
|
|
|
char *prop;
|
|
|
|
|
|
|
|
prop = "vdd-polarity-negative";
|
2017-05-19 02:09:37 +00:00
|
|
|
uc_pdata->vdd_polarity_negative = dev_read_bool(dev, prop);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
2018-07-24 14:31:29 +00:00
|
|
|
/* Optionally get regulators */
|
|
|
|
ret = device_get_supply_regulator(dev, "vdd-supply",
|
|
|
|
&uc_pdata->vdd_supply);
|
|
|
|
if (!ret)
|
2020-12-03 23:55:23 +00:00
|
|
|
return adc_vdd_plat_update(dev);
|
2018-07-24 14:31:29 +00:00
|
|
|
|
2015-10-27 12:08:00 +00:00
|
|
|
if (ret != -ENOENT)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* No vdd-supply phandle. */
|
|
|
|
prop = "vdd-microvolts";
|
2017-05-19 02:09:37 +00:00
|
|
|
uc_pdata->vdd_microvolts = dev_read_u32_default(dev, prop, -ENODATA);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-12-03 23:55:23 +00:00
|
|
|
static int adc_vss_plat_set(struct udevice *dev)
|
2015-10-27 12:08:00 +00:00
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
|
2017-05-19 02:09:37 +00:00
|
|
|
int ret;
|
2015-10-27 12:08:00 +00:00
|
|
|
char *prop;
|
|
|
|
|
|
|
|
prop = "vss-polarity-negative";
|
2017-05-19 02:09:37 +00:00
|
|
|
uc_pdata->vss_polarity_negative = dev_read_bool(dev, prop);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
2018-07-24 14:31:29 +00:00
|
|
|
ret = device_get_supply_regulator(dev, "vss-supply",
|
|
|
|
&uc_pdata->vss_supply);
|
|
|
|
if (!ret)
|
2020-12-03 23:55:23 +00:00
|
|
|
return adc_vss_plat_update(dev);
|
2018-07-24 14:31:29 +00:00
|
|
|
|
2015-10-27 12:08:00 +00:00
|
|
|
if (ret != -ENOENT)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* No vss-supply phandle. */
|
|
|
|
prop = "vss-microvolts";
|
2017-05-19 02:09:37 +00:00
|
|
|
uc_pdata->vss_microvolts = dev_read_u32_default(dev, prop, -ENODATA);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int adc_pre_probe(struct udevice *dev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2020-12-03 23:55:18 +00:00
|
|
|
/* Set ADC VDD plat: polarity, uV, regulator (phandle). */
|
2020-12-03 23:55:23 +00:00
|
|
|
ret = adc_vdd_plat_set(dev);
|
2015-10-27 12:08:00 +00:00
|
|
|
if (ret)
|
2017-09-16 05:10:41 +00:00
|
|
|
pr_err("%s: Can't update Vdd. Error: %d", dev->name, ret);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
2020-12-03 23:55:18 +00:00
|
|
|
/* Set ADC VSS plat: polarity, uV, regulator (phandle). */
|
2020-12-03 23:55:23 +00:00
|
|
|
ret = adc_vss_plat_set(dev);
|
2015-10-27 12:08:00 +00:00
|
|
|
if (ret)
|
2017-09-16 05:10:41 +00:00
|
|
|
pr_err("%s: Can't update Vss. Error: %d", dev->name, ret);
|
2015-10-27 12:08:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
UCLASS_DRIVER(adc) = {
|
|
|
|
.id = UCLASS_ADC,
|
|
|
|
.name = "adc",
|
|
|
|
.pre_probe = adc_pre_probe,
|
2020-12-03 23:55:18 +00:00
|
|
|
.per_device_plat_auto = ADC_UCLASS_PLATDATA_SIZE,
|
2015-10-27 12:08:00 +00:00
|
|
|
};
|