2019-02-17 03:24:49 +00:00
|
|
|
config PCH
|
|
|
|
|
bool "Enable Platform-controller Hub (PCH) support"
|
|
|
|
|
depends on X86 || SANDBOX
|
|
|
|
|
help
|
|
|
|
|
Most x86 chips include a PCH which is responsible for handling
|
|
|
|
|
parts of the system not handled by that CPU. It supersedes the
|
|
|
|
|
northbridge / southbridge architecture that was previously used. The
|
|
|
|
|
PCH allows for higher performance since the memory functions are
|
|
|
|
|
handled in the CPU.
|
2019-12-07 04:42:14 +00:00
|
|
|
|
|
|
|
|
config X86_PCH7
|
|
|
|
|
bool "Add support for Intel PCH7"
|
|
|
|
|
default y if X86
|
|
|
|
|
help
|
|
|
|
|
Enable this if your SoC uses Platform Controller Hub 7 (PCH7). This
|
|
|
|
|
dates from about 2011 and is used on baytrail, for example. The
|
|
|
|
|
PCH provides access to the GPIO and SPI base addresses, among other
|
|
|
|
|
functions.
|
|
|
|
|
|
|
|
|
|
config X86_PCH9
|
|
|
|
|
bool "Add support for Intel PCH9"
|
|
|
|
|
default y if X86
|
|
|
|
|
help
|
|
|
|
|
Enable this if your SoC uses Platform Controller Hub 9 (PCH9). This
|
|
|
|
|
dates from about 2015 and is used on baytrail, for example. The
|
|
|
|
|
PCH provides access to the GPIO and SPI base addresses, among other
|
|
|
|
|
functions.
|
