2018-06-14 11:43:39 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2018 - Beniamino Galvani <b.galvani@gmail.com>
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* (C) Copyright 2018 - BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef CLK_MESON_H
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#define CLK_MESON_H
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/* Gate Structure */
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2018-06-14 11:43:39 +00:00
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struct meson_gate {
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unsigned int reg;
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unsigned int bit;
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};
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#define MESON_GATE(id, _reg, _bit) \
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[id] = { \
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.reg = (_reg), \
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.bit = (_bit), \
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}
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/* PLL Parameters */
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struct parm {
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u16 reg_off;
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u8 shift;
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u8 width;
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};
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#define PMASK(width) GENMASK(width - 1, 0)
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#define SETPMASK(width, shift) GENMASK(shift + width - 1, shift)
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#define CLRPMASK(width, shift) (~SETPMASK(width, shift))
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#define PARM_GET(width, shift, reg) \
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(((reg) & SETPMASK(width, shift)) >> (shift))
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#define PARM_SET(width, shift, reg, val) \
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(((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
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/* MPLL Parameters */
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#define SDM_DEN 16384
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#define N2_MIN 4
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#define N2_MAX 511
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#endif
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