2020-01-10 14:51:47 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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#include <common.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2020-01-10 14:51:47 +00:00
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#include <asm/io.h>
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#include <asm/armv7_mpu.h>
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2021-05-20 14:10:13 +00:00
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#include <asm/mach-imx/sys_proto.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2020-01-10 14:51:47 +00:00
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int arch_cpu_init(void)
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{
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int i;
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2021-05-13 10:18:30 +00:00
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struct mpu_region_config imxrt_region_config[] = {
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2020-01-10 14:51:47 +00:00
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{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
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STRONG_ORDER, REGION_4GB },
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{ PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW,
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O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) },
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{ DMAMEM_BASE,
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REGION_2, XN_DIS, PRIV_RW_USR_RW,
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STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) },
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};
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/*
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* Configure the memory protection unit (MPU) to allow full access to
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* the whole 4GB address space.
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*/
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disable_mpu();
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2021-05-13 10:18:30 +00:00
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for (i = 0; i < ARRAY_SIZE(imxrt_region_config); i++)
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mpu_config(&imxrt_region_config[i]);
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2020-01-10 14:51:47 +00:00
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enable_mpu();
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return 0;
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}
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2021-05-20 14:10:13 +00:00
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u32 get_cpu_rev(void)
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{
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#if defined(CONFIG_IMXRT1020)
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return MXC_CPU_IMXRT1020 << 12;
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#elif defined(CONFIG_IMXRT1050)
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return MXC_CPU_IMXRT1050 << 12;
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#else
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#error This IMXRT SoC is not supported
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#endif
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}
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