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u-boot/include/configs/jetson-tk1.h

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ARM: tegra: add Jetson TK1 board Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-25 17:39:33 +00:00
/*
* (C) Copyright 2013-2014
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <linux/sizes.h>
#include "tegra124-common.h"
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 2
/* SPI */
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
ARM: tegra: Enable PCIe on Jetson TK1 The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes the second root port to a miniPCIe slot. Enable the PCIe controller and the network driver to allow the device to boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-12-10 05:25:21 +00:00
/* PCI host support */
#define CONFIG_CMD_PCI
ARM: tegra: add Jetson TK1 board Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-25 17:39:33 +00:00
/* General networking support */
ARM: tegra: enable DFU too Enable DFU protocol support (via the "dfu" command) on Tegra boards where USB device/gadget mode is enabled. Note that for DFU to operate correctly on Tegra, we still need some DFU fixes/enhancements that are going through the DFU -> USB trees. However, the code builds just fine without those changes, and applying this patch now will allow both sets of patches to meet in the main U-Boot tree much more quickly. In order to run test/dfu/dfu_gadget_test.sh, you would need to add the following to the board configuration: CONFIG_EXT4_WRITE CONFIG_CMD_EXT4_WRITE However, I haven't enabled those here, since I believe the main use-case for DFU on Tegra is raw flash writing, rather than filesystem access, so we don't need the additional code-size hit. However, I could be persuaded otherwise! We should probably add a separate test script for raw flash access. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-07-25 23:16:54 +00:00
#include "tegra-common-usb-gadget.h"
ARM: tegra: add Jetson TK1 board Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-25 17:39:33 +00:00
#include "tegra-common-post.h"
jetson-tk1: Add PSCI configuration options and reserve secure code The secure world code is relocated to the MB just below the top of 4G, we reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is not protected in h/w. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-04-21 05:18:40 +00:00
/* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
ARM: tegra: add Jetson TK1 board Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-25 17:39:33 +00:00
#endif /* __CONFIG_H */
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