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u-boot/board/amcc/bamboo/init.S

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Initial revision
2002-11-03 00:24:07 +00:00
/*
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
*
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-08 07:37:19 +00:00
* SPDX-License-Identifier: GPL-2.0+
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
*/
Initial revision
2002-11-03 00:24:07 +00:00
Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 12:34:52 +00:00
#include <asm-offsets.h>
Initial revision
2002-11-03 00:24:07 +00:00
#include <ppc_asm.tmpl>
#include <config.h>
Replace "#include <asm-$ARCH/$FILE>" with "#include <asm/$FILE>" The appropriate include/asm-$ARCH directory should already by symlinked to include/asm so using the whole "asm-$ARCH" path is unnecessary. This change should also allow us to move the include/asm-$ARCH directories into their appropriate lib/$ARCH/ directories. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 03:28:07 +00:00
#include <asm/mmu.h>
Initial revision
2002-11-03 00:24:07 +00:00
/**************************************************************************
* TLB TABLE
*
* This table is used by the cpu boot code to setup the initial tlb
* entries. Rather than make broad assumptions in the cpu source tree,
* this table lets each board set things up however they like.
*
* Pointer to the table is returned in r1
*
*************************************************************************/
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
.section .bootpg,"ax"
.globl tlbtab
Initial revision
2002-11-03 00:24:07 +00:00
tlbtab:
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
tlbtab_start
/*
* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
* speed up boot process. It is patched after relocation to enable SA_I
*/
#ifndef CONFIG_NAND_SPL
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
#else
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 0, AC_RWX | SA_G)
tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
#endif
/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
/* PCI base & peripherals */
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I)
tlbentry(CONFIG_SYS_NAND_ADDR, SZ_4K, CONFIG_SYS_NAND_ADDR, 0, AC_RWX | SA_W|SA_I)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
/* PCI */
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG)
tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG)
tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG)
tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
/* USB 2.0 Device */
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
tlbentry(CONFIG_SYS_USB_DEVICE, SZ_1K, CONFIG_SYS_USB_DEVICE, 0, AC_RW | SA_IG)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
tlbtab_end
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
/*
* For NAND booting the first TLB has to be reconfigured to full size
* and with caching disabled after running from RAM!
*/
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
#define TLB00 TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M)
#define TLB01 TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 0)
ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 11:57:18 +00:00
#define TLB02 TLB2(AC_RWX | SA_IG)
ppc4xx: Prepare Bamboo port for NAND booting support This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 13:19:29 +00:00
.globl reconfig_tlb0
reconfig_tlb0:
sync
isync
addi r4,r0,0x0000 /* TLB entry #0 */
lis r5,TLB00@h
ori r5,r5,TLB00@l
tlbwe r5,r4,0x0000 /* Save it out */
lis r5,TLB01@h
ori r5,r5,TLB01@l
tlbwe r5,r4,0x0001 /* Save it out */
lis r5,TLB02@h
ori r5,r5,TLB02@l
tlbwe r5,r4,0x0002 /* Save it out */
sync
isync
blr
#endif
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