2004-02-12 00:47:09 +00:00
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/*
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* MCF5282 Internal Memory Map
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*
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* Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2004-02-12 00:47:09 +00:00
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*/
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#ifndef __IMMAP_5282__
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#define __IMMAP_5282__
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2008-10-16 13:01:15 +00:00
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#define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000)
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#define MMAP_SDRAMC (CONFIG_SYS_MBAR + 0x00000040)
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#define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080)
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#define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100)
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#define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000140)
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#define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000180)
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#define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x000001C0)
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#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200)
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#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240)
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#define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280)
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#define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300)
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#define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340)
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#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400)
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#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440)
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#define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480)
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#define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0)
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#define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00)
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#define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00)
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#define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00)
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#define MMAP_FEC (CONFIG_SYS_MBAR + 0x00001000)
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#define MMAP_FECFIFO (CONFIG_SYS_MBAR + 0x00001400)
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#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000)
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#define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110000)
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#define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000)
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#define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000)
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#define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000)
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#define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000)
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#define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000)
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#define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000)
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#define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000)
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#define MMAP_QADC (CONFIG_SYS_MBAR + 0x00190000)
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#define MMAP_GPTMRA (CONFIG_SYS_MBAR + 0x001A0000)
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#define MMAP_GPTMRB (CONFIG_SYS_MBAR + 0x001B0000)
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#define MMAP_CAN (CONFIG_SYS_MBAR + 0x001C0000)
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#define MMAP_CFMC (CONFIG_SYS_MBAR + 0x001D0000)
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#define MMAP_CFMMEM (CONFIG_SYS_MBAR + 0x04000000)
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2006-04-20 06:42:42 +00:00
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2008-10-21 10:03:07 +00:00
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#include <asm/coldfire/eport.h>
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#include <asm/coldfire/flexbus.h>
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#include <asm/coldfire/flexcan.h>
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#include <asm/coldfire/intctrl.h>
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#include <asm/coldfire/qspi.h>
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2007-08-16 00:38:15 +00:00
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/* System Control Module */
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typedef struct scm_ctrl {
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u32 ipsbar;
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u32 res1;
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u32 rambar;
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u32 res2;
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u8 crsr;
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u8 cwcr;
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u8 lpicr;
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u8 cwsr;
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u32 res3;
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u8 mpark;
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u8 res4[3];
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u8 pacr0;
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u8 pacr1;
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u8 pacr2;
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u8 pacr3;
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u8 pacr4;
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u8 res5;
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u8 pacr5;
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u8 pacr6;
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u8 pacr7;
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u8 res6;
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u8 pacr8;
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u8 res7;
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u8 gpacr0;
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u8 gpacr1;
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u16 res8;
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} scm_t;
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2006-04-20 06:42:42 +00:00
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2008-10-21 10:03:07 +00:00
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typedef struct canex_ctrl {
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can_msg_t msg[16]; /* 0x00 Message Buffer 0-15 */
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} canex_t;
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2007-08-16 00:38:15 +00:00
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/* Clock Module registers */
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typedef struct pll_ctrl {
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u16 syncr; /* 0x00 synthesizer control register */
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u16 synsr; /* 0x02 synthesizer status register */
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} pll_t;
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/* Watchdog registers */
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typedef struct wdog_ctrl {
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ushort wcr;
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ushort wmr;
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ushort wcntr;
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ushort wsr;
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} wdog_t;
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2004-02-12 00:47:09 +00:00
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2007-08-16 00:38:15 +00:00
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#endif /* __IMMAP_5282__ */
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