2020-05-29 06:03:35 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2019 SiFive, Inc
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*
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* Authors:
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* Pragnesh Patel <pragnesh.patel@sifive.com>
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*/
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#include <init.h>
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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#include <linux/delay.h>
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2020-08-03 06:09:06 +00:00
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#include <linux/io.h>
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2020-05-29 06:03:35 +00:00
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/spl.h>
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2020-08-03 06:09:06 +00:00
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#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
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#define MODE_SELECT_REG 0x1000
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#define MODE_SELECT_QSPI 0x6
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#define MODE_SELECT_SD 0xb
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#define MODE_SELECT_MASK GENMASK(3, 0)
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2020-05-29 06:03:35 +00:00
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2020-08-03 06:09:02 +00:00
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int spl_board_init_f(void)
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2020-05-29 06:03:35 +00:00
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{
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int ret;
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2020-08-03 06:09:03 +00:00
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ret = spl_soc_init();
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2020-05-29 06:03:35 +00:00
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if (ret) {
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debug("FU540 SPL init failed: %d\n", ret);
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return ret;
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}
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/*
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* GEMGXL init VSC8541 PHY reset sequence;
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* leave pull-down active for 2ms
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*/
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udelay(2000);
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ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
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if (ret) {
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debug("gem_phy_reset gpio request failed: %d\n", ret);
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return ret;
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}
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/* Set GPIO 12 (PHY NRESET) */
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ret = gpio_direction_output(GEM_PHY_RESET, 1);
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if (ret) {
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debug("gem_phy_reset gpio direction set failed: %d\n", ret);
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return ret;
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}
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udelay(1);
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/* Reset PHY again to enter unmanaged mode */
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gpio_set_value(GEM_PHY_RESET, 0);
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udelay(1);
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gpio_set_value(GEM_PHY_RESET, 1);
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mdelay(15);
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return 0;
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}
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2020-08-03 06:09:06 +00:00
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u32 spl_boot_device(void)
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{
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u32 mode_select = readl((void *)MODE_SELECT_REG);
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u32 boot_device = mode_select & MODE_SELECT_MASK;
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switch (boot_device) {
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case MODE_SELECT_QSPI:
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return BOOT_DEVICE_SPI;
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case MODE_SELECT_SD:
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return BOOT_DEVICE_MMC1;
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default:
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debug("Unsupported boot device 0x%x but trying MMC1\n",
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boot_device);
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return BOOT_DEVICE_MMC1;
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}
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* boot using first FIT config */
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return 0;
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}
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#endif
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