u-boot/board/freescale/t4rdb/t4_pbi.cfg

#
# Copyright 2014 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#

#PBI commands
#Initialize CPC1
09010000 00200400
09138000 00000000
091380c0 00000100
#512KB SRAM
09010100 00000000
09010104 fff80009
09010f00 08000000
#enable CPC1
09010000 80000000
#Configure LAW for CPC1
09000d00 00000000
09000d04 fff80000
09000d08 81000012
#Configure alternate space
09000010 00000000
09000014 ff000000
09000018 81000000
#Flush PBL data
091380c0 00100000
powerpc/85xx: Add T4240RDB board support T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h] 2014-04-14 10:42:06 +00:00			`#`
			`# Copyright 2014 Freescale Semiconductor, Inc.`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`#PBI commands`
			`#Initialize CPC1`
			`09010000 00200400`
			`09138000 00000000`
			`091380c0 00000100`
			`#512KB SRAM`
			`09010100 00000000`
			`09010104 fff80009`
			`09010f00 08000000`
			`#enable CPC1`
			`09010000 80000000`
			`#Configure LAW for CPC1`
			`09000d00 00000000`
			`09000d04 fff80000`
			`09000d08 81000012`
			`#Configure alternate space`
			`09000010 00000000`
			`09000014 ff000000`
			`09000018 81000000`
			`#Flush PBL data`
pbl: use "wait" command instead of "flush" command PBL flush command is restricted to CCSR memory space. So use WAIT PBI command to provide enough time for data to get flush in target memory. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [York Sun: rewrap commit message] Reviewed-by: York Sun <york.sun@nxp.com> 2016-09-08 04:55:33 +00:00			`091380c0 00100000`