u-boot/arch/xtensa/include/asm/cache.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2009 Tensilica Inc.
 */
#ifndef _XTENSA_CACHE_H
#define _XTENSA_CACHE_H

#include <asm/arch/core.h>

#define ARCH_DMA_MINALIGN	XCHAL_DCACHE_LINESIZE

#ifndef __ASSEMBLY__

void __flush_dcache_all(void);
void __flush_invalidate_dcache_range(unsigned long addr, unsigned long size);
void __invalidate_dcache_all(void);
void __invalidate_dcache_range(unsigned long addr, unsigned long size);

void __invalidate_icache_all(void);
void __invalidate_icache_range(unsigned long addr, unsigned long size);

#endif

#endif	/* _XTENSA_CACHE_H */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
xtensa: add support for the xtensa processor architecture [2/2] The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> 2016-08-10 15:36:44 +00:00			`/*`
			`* Copyright (C) 2009 Tensilica Inc.`
			`*/`
			`#ifndef _XTENSA_CACHE_H`
			`#define _XTENSA_CACHE_H`

			`#include <asm/arch/core.h>`

			`#define ARCH_DMA_MINALIGN XCHAL_DCACHE_LINESIZE`

			`#ifndef __ASSEMBLY__`

			`void __flush_dcache_all(void);`
			`void __flush_invalidate_dcache_range(unsigned long addr, unsigned long size);`
			`void __invalidate_dcache_all(void);`
			`void __invalidate_dcache_range(unsigned long addr, unsigned long size);`

			`void __invalidate_icache_all(void);`
			`void __invalidate_icache_range(unsigned long addr, unsigned long size);`

			`#endif`

			`#endif /* _XTENSA_CACHE_H */`