u-boot/arch/arm/dts/ast2500-u-boot.dtsi

#include <dt-bindings/clock/ast2500-scu.h>
#include <dt-bindings/reset/ast2500-reset.h>

#include "ast2500.dtsi"

/ {
	scu: clock-controller@1e6e2000 {
		compatible = "aspeed,ast2500-scu";
		reg = <0x1e6e2000 0x1000>;
		u-boot,dm-pre-reloc;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	rst: reset-controller {
		u-boot,dm-pre-reloc;
		compatible = "aspeed,ast2500-reset";
		aspeed,wdt = <&wdt1>;
		#reset-cells = <1>;
	};

	sdrammc: sdrammc@1e6e0000 {
		u-boot,dm-pre-reloc;
		compatible = "aspeed,ast2500-sdrammc";
		reg = <0x1e6e0000 0x174
			0x1e6e0200 0x1d4 >;
		#reset-cells = <1>;
		clocks = <&scu PLL_MPLL>;
		resets = <&rst AST_RESET_SDRAM>;
	};

	ahb {
		u-boot,dm-pre-reloc;

		apb {
			u-boot,dm-pre-reloc;

			timer: timer@1e782000 {
				u-boot,dm-pre-reloc;
			};

			uart1: serial@1e783000 {
				clocks = <&scu PCLK_UART1>;
			};

			uart2: serial@1e78d000 {
				clocks = <&scu PCLK_UART2>;
			};

			uart3: serial@1e78e000 {
				clocks = <&scu PCLK_UART3>;
			};

			uart4: serial@1e78f000 {
				clocks = <&scu PCLK_UART4>;
			};

			uart5: serial@1e784000 {
				clocks = <&scu PCLK_UART5>;
			};
		};
	};
};

&mac0 {
	clocks = <&scu PCLK_MAC1>, <&scu PLL_D2PLL>;
};

&mac1 {
	clocks = <&scu PCLK_MAC2>, <&scu PLL_D2PLL>;
};