mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 22:33:18 +00:00
212 lines
4.8 KiB
Text
212 lines
4.8 KiB
Text
|
// SPDX-License-Identifier: GPL-2.0
|
||
|
/*
|
||
|
* Copyright (C) 2020 Marvell International Ltd.
|
||
|
*
|
||
|
*/
|
||
|
|
||
|
/*
|
||
|
* Device Tree file for Marvell Armada AP806/AP807.
|
||
|
*/
|
||
|
|
||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||
|
|
||
|
/dts-v1/;
|
||
|
|
||
|
/ {
|
||
|
compatible = "marvell,armada-ap806";
|
||
|
#address-cells = <2>;
|
||
|
#size-cells = <2>;
|
||
|
|
||
|
aliases {
|
||
|
serial0 = &uart0;
|
||
|
serial1 = &uart1;
|
||
|
};
|
||
|
|
||
|
psci {
|
||
|
compatible = "arm,psci-0.2";
|
||
|
method = "smc";
|
||
|
};
|
||
|
|
||
|
reserved-memory {
|
||
|
#address-cells = <2>;
|
||
|
#size-cells = <2>;
|
||
|
ranges;
|
||
|
|
||
|
psci-area@4000000 {
|
||
|
reg = <0x0 0x4000000 0x0 0x200000>;
|
||
|
no-map;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
AP_NAME {
|
||
|
#address-cells = <2>;
|
||
|
#size-cells = <2>;
|
||
|
compatible = "simple-bus";
|
||
|
interrupt-parent = <&gic>;
|
||
|
ranges;
|
||
|
|
||
|
config-space {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
compatible = "simple-bus";
|
||
|
ranges = <0x0 0x0 0xf0000000 0x1000000>;
|
||
|
|
||
|
gic: interrupt-controller@210000 {
|
||
|
compatible = "arm,gic-400";
|
||
|
#interrupt-cells = <3>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
ranges;
|
||
|
interrupt-controller;
|
||
|
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||
|
reg = <0x210000 0x10000>,
|
||
|
<0x220000 0x20000>,
|
||
|
<0x240000 0x20000>,
|
||
|
<0x260000 0x20000>;
|
||
|
|
||
|
gic_v2m0: v2m@280000 {
|
||
|
compatible = "arm,gic-v2m-frame";
|
||
|
msi-controller;
|
||
|
reg = <0x280000 0x1000>;
|
||
|
arm,msi-base-spi = <160>;
|
||
|
arm,msi-num-spis = <32>;
|
||
|
};
|
||
|
gic_v2m1: v2m@290000 {
|
||
|
compatible = "arm,gic-v2m-frame";
|
||
|
msi-controller;
|
||
|
reg = <0x290000 0x1000>;
|
||
|
arm,msi-base-spi = <192>;
|
||
|
arm,msi-num-spis = <32>;
|
||
|
};
|
||
|
gic_v2m2: v2m@2a0000 {
|
||
|
compatible = "arm,gic-v2m-frame";
|
||
|
msi-controller;
|
||
|
reg = <0x2a0000 0x1000>;
|
||
|
arm,msi-base-spi = <224>;
|
||
|
arm,msi-num-spis = <32>;
|
||
|
};
|
||
|
gic_v2m3: v2m@2b0000 {
|
||
|
compatible = "arm,gic-v2m-frame";
|
||
|
msi-controller;
|
||
|
reg = <0x2b0000 0x1000>;
|
||
|
arm,msi-base-spi = <256>;
|
||
|
arm,msi-num-spis = <32>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
timer {
|
||
|
compatible = "arm,armv8-timer";
|
||
|
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||
|
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||
|
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||
|
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
|
||
|
};
|
||
|
|
||
|
odmi: odmi@300000 {
|
||
|
compatible = "marvell,odmi-controller";
|
||
|
interrupt-controller;
|
||
|
msi-controller;
|
||
|
marvell,odmi-frames = <4>;
|
||
|
reg = <0x300000 0x4000>,
|
||
|
<0x304000 0x4000>,
|
||
|
<0x308000 0x4000>,
|
||
|
<0x30C000 0x4000>;
|
||
|
marvell,spi-base = <128>, <136>, <144>, <152>;
|
||
|
};
|
||
|
|
||
|
ap_pinctl: ap-pinctl@6F4000 {
|
||
|
compatible = "marvell,ap806-pinctrl";
|
||
|
bank-name ="apn-806";
|
||
|
reg = <0x6F4000 0x10>;
|
||
|
pin-count = <20>;
|
||
|
max-func = <3>;
|
||
|
|
||
|
ap_i2c0_pins: i2c-pins-0 {
|
||
|
marvell,pins = < 4 5 >;
|
||
|
marvell,function = <3>;
|
||
|
};
|
||
|
ap_emmc_pins: emmc-pins-0 {
|
||
|
marvell,pins = < 0 1 2 3 4 5 6 7
|
||
|
8 9 10 12 >;
|
||
|
marvell,function = <1>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
ap_gpio0: gpio@6F5040 {
|
||
|
compatible = "marvell,orion-gpio";
|
||
|
reg = <0x6F5040 0x40>;
|
||
|
ngpios = <20>;
|
||
|
gpio-controller;
|
||
|
#gpio-cells = <2>;
|
||
|
};
|
||
|
|
||
|
ap_spi0: spi@510600 {
|
||
|
compatible = "marvell,armada-380-spi";
|
||
|
reg = <0x510600 0x50>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
cell-index = <0>;
|
||
|
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
clocks = <&ap_syscon 3>;
|
||
|
status = "disabled";
|
||
|
};
|
||
|
|
||
|
ap_i2c0: i2c@511000 {
|
||
|
compatible = "marvell,mv78230-i2c";
|
||
|
reg = <0x511000 0x20>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
timeout-ms = <1000>;
|
||
|
clocks = <&ap_syscon 3>;
|
||
|
status = "disabled";
|
||
|
};
|
||
|
|
||
|
uart0: serial@512000 {
|
||
|
compatible = "snps,dw-apb-uart";
|
||
|
reg = <0x512000 0x100>;
|
||
|
reg-shift = <2>;
|
||
|
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
reg-io-width = <1>;
|
||
|
clocks = <&ap_syscon 3>;
|
||
|
status = "disabled";
|
||
|
clock-frequency = <200000000>;
|
||
|
};
|
||
|
|
||
|
uart1: serial@512100 {
|
||
|
compatible = "snps,dw-apb-uart";
|
||
|
reg = <0x512100 0x100>;
|
||
|
reg-shift = <2>;
|
||
|
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
reg-io-width = <1>;
|
||
|
clocks = <&ap_syscon 3>;
|
||
|
status = "disabled";
|
||
|
|
||
|
};
|
||
|
|
||
|
watchdog: watchdog@610000 {
|
||
|
compatible = "arm,sbsa-gwdt";
|
||
|
reg = <0x610000 0x1000>, <0x600000 0x1000>;
|
||
|
};
|
||
|
|
||
|
ap_sdhci0: sdhci@6e0000 {
|
||
|
compatible = "marvell,armada-8k-sdhci";
|
||
|
reg = <0x6e0000 0x300>;
|
||
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
dma-coherent;
|
||
|
status = "disabled";
|
||
|
};
|
||
|
|
||
|
ap_syscon: system-controller@6f4000 {
|
||
|
compatible = "marvell,ap806-system-controller",
|
||
|
"syscon";
|
||
|
#clock-cells = <1>;
|
||
|
clock-output-names = "ap-cpu-cluster-0",
|
||
|
"ap-cpu-cluster-1",
|
||
|
"ap-fixed", "ap-mss";
|
||
|
reg = <0x6f4000 0x1000>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|