2010-10-30 23:09:58 +00:00
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2010
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <net.h>
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#include <netdev.h>
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#include <mmc.h>
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#include <i2c.h>
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#include <spi.h>
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2011-06-06 00:16:42 +00:00
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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2010-10-30 23:09:58 +00:00
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#include <asm/arch/at91sam9260_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/at91_shdwn.h>
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#include <asm/arch/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_NAND
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static void nand_hw_init(void)
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{
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2011-06-06 00:16:42 +00:00
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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2010-10-30 23:09:58 +00:00
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unsigned long csa;
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2011-06-06 00:16:42 +00:00
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/* Assign CS3 to NAND/SmartMedia Interface */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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2010-10-30 23:09:58 +00:00
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/* Configure SMC CS3 for NAND/SmartMedia */
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2011-06-06 00:16:42 +00:00
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(2),
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&smc->cs[3].mode);
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2010-10-30 23:09:58 +00:00
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#endif
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#ifdef CONFIG_MACB
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static void macb_hw_init(void)
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{
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2011-06-06 00:16:42 +00:00
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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2010-10-30 23:09:58 +00:00
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/* Enable EMAC clock */
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2011-06-06 00:16:42 +00:00
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writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
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2010-10-30 23:09:58 +00:00
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/* Initialize EMAC=MACB hardware */
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at91_macb_hw_init();
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}
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#endif
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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/* this is a weak define that we are overriding */
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int board_mmc_init(bd_t *bd)
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{
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2011-06-06 00:16:42 +00:00
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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2010-10-30 23:09:58 +00:00
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/* Enable MCI clock */
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2011-06-06 00:16:42 +00:00
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writel(1 << ATMEL_ID_MCI, &pmc->pcer);
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2010-10-30 23:09:58 +00:00
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/* Initialize MCI hardware */
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at91_mci_hw_init();
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/* This calls the atmel_mmc_init in gen_atmel_mci.c */
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2011-06-06 00:16:42 +00:00
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return atmel_mci_init((void *)ATMEL_BASE_MCI);
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2010-10-30 23:09:58 +00:00
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}
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/* this is a weak define that we are overriding */
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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{
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/*
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* the only currently existing use of this function
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* (fsl_esdhc.c) suggests this function must return
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* *cs = TRUE if a card is NOT detected -> in most
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* cases the value of the pin when the detect switch
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* closes to GND
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*/
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*cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
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return 0;
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}
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#endif
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int board_early_init_f(void)
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{
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2011-06-06 00:16:42 +00:00
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struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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2010-10-30 23:09:58 +00:00
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/*
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* make sure the board can be powered on by
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* any transition on WKUP
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*/
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writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
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&shdwn->mr);
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/* Enable clocks for all PIOs */
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2011-06-06 00:16:42 +00:00
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writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
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(1 << ATMEL_ID_PIOC),
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&pmc->pcer);
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2010-10-30 23:09:58 +00:00
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/* set SCL0 and SDA0 to open drain */
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at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
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at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
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at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
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at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
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at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
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at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
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/* set SCL1 and SDA1 to open drain */
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at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
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at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
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at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
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at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
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at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
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at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
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return 0;
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}
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int board_init(void)
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{
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/* arch number of TOP9000 Board */
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gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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2011-06-06 00:16:42 +00:00
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at91_seriald_hw_init();
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2010-10-30 23:09:58 +00:00
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#ifdef CONFIG_CMD_NAND
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nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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macb_hw_init();
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#endif
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#ifdef CONFIG_ATMEL_SPI0
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/* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
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at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
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#endif
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#ifdef CONFIG_ATMEL_SPI1
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at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
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#endif
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return 0;
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}
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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/* read 'factory' part of EEPROM */
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read_factory_r();
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return 0;
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}
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#endif
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int dram_init(void)
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{
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gd->ram_size = get_ram_size(
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(void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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/*
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* Initialize ethernet HW addresses prior to starting Linux,
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* needed for nfsroot.
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* TODO: We need to investigate if that is really necessary.
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*/
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eth_init(gd->bd);
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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int num = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0,
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2011-06-06 00:16:42 +00:00
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(void *)ATMEL_BASE_EMAC0,
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2010-10-30 23:09:58 +00:00
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CONFIG_SYS_PHY_ID);
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if (!rc)
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num++;
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#endif
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#ifdef CONFIG_ENC28J60
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
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ENC_SPI_CLOCK, SPI_MODE_0);
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if (!rc)
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num++;
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# ifdef CONFIG_ENC28J60_2
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
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ENC_SPI_CLOCK, SPI_MODE_0);
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if (!rc)
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num++;
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# ifdef CONFIG_ENC28J60_3
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
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ENC_SPI_CLOCK, SPI_MODE_0);
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if (!rc)
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num++;
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# endif
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# endif
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#endif
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return num;
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}
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/*
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* I2C access functions
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*
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* Note:
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* We need to access Bus 0 before relocation to access the
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* environment settings.
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* However i2c_get_bus_num() cannot be called before
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* relocation.
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*/
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#ifdef CONFIG_SOFT_I2C
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void iic_init(void)
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{
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/* ports are now initialized in board_early_init_f() */
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}
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int iic_read(void)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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case 0:
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return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
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case 1:
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return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
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}
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return 1;
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}
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void iic_sda(int bit)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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case 0:
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at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
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break;
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case 1:
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at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
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break;
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}
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}
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void iic_scl(int bit)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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case 0:
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at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
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break;
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case 1:
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at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
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break;
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}
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}
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#endif
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