2006-10-24 12:21:16 +00:00
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/*
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* Copyright (C) 2006 Atmel Corporation
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2006-10-24 12:21:16 +00:00
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*/
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#ifndef __ASM_AVR32_SDRAM_H
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#define __ASM_AVR32_SDRAM_H
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2008-05-19 09:36:28 +00:00
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struct sdram_config {
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/* Number of data bits. */
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enum {
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2008-08-30 15:28:36 +00:00
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SDRAM_DATA_16BIT = 16,
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SDRAM_DATA_32BIT = 32,
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2008-05-19 09:36:28 +00:00
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} data_bits;
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/* Number of address bits */
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uint8_t row_bits, col_bits, bank_bits;
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/* SDRAM timings in cycles */
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uint8_t cas, twr, trc, trp, trcd, tras, txsr;
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2008-01-23 16:20:14 +00:00
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/* SDRAM refresh period in cycles */
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unsigned long refresh_period;
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2006-10-24 12:21:16 +00:00
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};
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2008-05-19 09:36:28 +00:00
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/*
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* Attempt to initialize the SDRAM controller using the specified
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* parameters. Return the expected size of the memory area based on
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* the number of address and data bits.
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*
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* The caller should verify that the configuration is correct by
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* running a memory test, e.g. get_ram_size().
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*/
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extern unsigned long sdram_init(void *sdram_base,
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const struct sdram_config *config);
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2006-10-24 12:21:16 +00:00
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#endif /* __ASM_AVR32_SDRAM_H */
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