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https://github.com/AsahiLinux/u-boot
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48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* T30 HTC Endeavoru SPL stage configuration
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*
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* (C) Copyright 2010-2013
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* NVIDIA Corporation <www.nvidia.com>
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*
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* (C) Copyright 2022
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* Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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#include <common.h>
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#include <asm/arch-tegra/tegra_i2c.h>
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#include <linux/delay.h>
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/*
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* Endeavoru uses TPS80032 PMIC with SMPS1 and SMPS2 in strandard
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* mode with zero offset.
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*/
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#define TPS80032_DVS_I2C_ADDR (0x12 << 1)
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#define TPS80032_SMPS1_CFG_VOLTAGE_REG 0x56
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#define TPS80032_SMPS2_CFG_VOLTAGE_REG 0x5C
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#define TPS80032_SMPS1_CFG_VOLTAGE_DATA (0x2100 | TPS80032_SMPS1_CFG_VOLTAGE_REG)
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#define TPS80032_SMPS2_CFG_VOLTAGE_DATA (0x3000 | TPS80032_SMPS2_CFG_VOLTAGE_REG)
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#define TPS80032_CTL1_I2C_ADDR (0x48 << 1)
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#define TPS80032_SMPS1_CFG_STATE_REG 0x54
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#define TPS80032_SMPS2_CFG_STATE_REG 0x5A
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#define TPS80032_SMPS1_CFG_STATE_DATA (0x0100 | TPS80032_SMPS1_CFG_STATE_REG)
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#define TPS80032_SMPS2_CFG_STATE_DATA (0x0100 | TPS80032_SMPS2_CFG_STATE_REG)
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void pmic_enable_cpu_vdd(void)
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{
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/* Set VDD_CORE to 1.200V. */
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tegra_i2c_ll_write(TPS80032_DVS_I2C_ADDR, TPS80032_SMPS2_CFG_VOLTAGE_DATA);
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udelay(1000);
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tegra_i2c_ll_write(TPS80032_CTL1_I2C_ADDR, TPS80032_SMPS2_CFG_STATE_DATA);
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udelay(1000);
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/* Bring up VDD_CPU to 1.0125V. */
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tegra_i2c_ll_write(TPS80032_DVS_I2C_ADDR, TPS80032_SMPS1_CFG_VOLTAGE_DATA);
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udelay(1000);
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tegra_i2c_ll_write(TPS80032_CTL1_I2C_ADDR, TPS80032_SMPS1_CFG_STATE_DATA);
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udelay(10 * 1000);
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}
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