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u-boot/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c

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ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
/*
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
#include <linux/kernel.h>
ARM: uniphier: move headers out of include/mach directory These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#include "boot-device.h"
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
const struct uniphier_boot_device uniphier_pxs2_boot_device_table[] = {
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
ARM: uniphier: clean up boot mode tables Tidy up alignment of open parentheses. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-24 12:13:58 +00:00
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
ARM: uniphier: clean up boot mode tables Tidy up alignment of open parentheses. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-24 12:13:58 +00:00
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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{BOOT_DEVICE_NONE, "Reserved"},
};
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
const unsigned uniphier_pxs2_boot_device_count =
ARRAY_SIZE(uniphier_pxs2_boot_device_table);
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
int uniphier_pxs2_boot_device_is_usb(u32 pinmon)
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
{
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
return !!(pinmon & 0x00000040);
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
}
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode)
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
{
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
if (mode == BOOT_DEVICE_USB)
return BOOT_DEVICE_NOR;
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-13 16:24:26 +00:00
return mode;
ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-21 15:27:41 +00:00
}
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