2009-03-27 21:02:45 +00:00
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/*
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2011-01-05 00:04:01 +00:00
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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2009-03-27 21:02:45 +00:00
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2009-03-27 21:02:45 +00:00
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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/*
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* LAW(Local Access Window) configuration:
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*
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*0) 0x0000_0000 0x7fff_ffff DDR 2G
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*1) 0xa000_0000 0xbfff_ffff PCIe MEM 512MB
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*-) 0xe000_0000 0xe00f_ffff CCSR 1M
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*2) 0xe280_0000 0xe2ff_ffff PCIe I/O 8M
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*3) 0xc000_0000 0xdfff_ffff SRIO 512MB
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*4.a) 0xf000_0000 0xf3ff_ffff SDRAM 64MB
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*4.b) 0xf800_0000 0xf800_7fff BCSR 32KB
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*4.c) 0xf800_8000 0xf800_ffff PIB (CS4) 32KB
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*4.d) 0xf801_0000 0xf801_7fff PIB (CS5) 32KB
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*4.e) 0xfe00_0000 0xffff_ffff Flash 32MB
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*
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*Notes:
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* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
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* If flash is 8M at default position (last 8M), no LAW needed.
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*
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*/
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struct law_entry law_table[] = {
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#ifndef CONFIG_SPD_EEPROM
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SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_1G, LAW_TRGT_IF_DDR),
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#endif
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SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_LBC),
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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