2015-09-21 15:27:39 +00:00
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/*
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2016-07-22 04:38:32 +00:00
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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2015-09-21 15:27:39 +00:00
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MACH_INIT_H
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#define __MACH_INIT_H
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2016-02-26 05:21:40 +00:00
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#include <linux/types.h>
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2016-02-26 05:21:34 +00:00
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#define UNIPHIER_MAX_NR_DRAM_CH 3
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struct uniphier_dram_ch {
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unsigned long size;
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unsigned int width;
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};
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2015-09-21 15:27:39 +00:00
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struct uniphier_board_data {
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2016-02-26 05:21:34 +00:00
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unsigned int dram_freq;
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struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH];
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2016-07-22 04:38:32 +00:00
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unsigned int flags;
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2016-09-13 16:06:10 +00:00
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2017-02-05 01:52:12 +00:00
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#define UNIPHIER_BD_DRAM_SPARSE BIT(9)
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#define UNIPHIER_BD_DDR3PLUS BIT(8)
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2016-09-13 16:06:10 +00:00
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2016-10-27 14:47:02 +00:00
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#define UNIPHIER_BD_BOARD_GET_TYPE(f) ((f) & 0x7)
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2016-09-13 16:06:10 +00:00
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#define UNIPHIER_BD_BOARD_LD20_REF 0 /* LD20 reference */
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#define UNIPHIER_BD_BOARD_LD20_GLOBAL 1 /* LD20 TV Set */
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2016-10-27 14:47:02 +00:00
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#define UNIPHIER_BD_BOARD_LD20_C1 2 /* LD20 TV Set C1 */
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#define UNIPHIER_BD_BOARD_LD21_REF 3 /* LD21 reference */
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#define UNIPHIER_BD_BOARD_LD21_GLOBAL 4 /* LD21 TV Set */
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2015-09-21 15:27:39 +00:00
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};
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2015-12-17 08:47:42 +00:00
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const struct uniphier_board_data *uniphier_get_board_param(void);
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2015-09-21 15:27:39 +00:00
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2016-03-30 11:17:02 +00:00
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int uniphier_sld3_init(const struct uniphier_board_data *bd);
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int uniphier_ld4_init(const struct uniphier_board_data *bd);
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int uniphier_pro4_init(const struct uniphier_board_data *bd);
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int uniphier_sld8_init(const struct uniphier_board_data *bd);
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int uniphier_pro5_init(const struct uniphier_board_data *bd);
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int uniphier_pxs2_init(const struct uniphier_board_data *bd);
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2016-05-24 12:14:01 +00:00
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int uniphier_ld11_init(const struct uniphier_board_data *bd);
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2016-04-21 05:43:18 +00:00
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int uniphier_ld20_init(const struct uniphier_board_data *bd);
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2015-09-21 15:27:39 +00:00
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#if defined(CONFIG_MICRO_SUPPORT_CARD)
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2017-01-15 05:59:05 +00:00
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void uniphier_sbc_init_admulti(void);
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void uniphier_sbc_init_savepin(void);
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void uniphier_ld4_sbc_init(void);
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void uniphier_pxs2_sbc_init(void);
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void uniphier_ld11_sbc_init(void);
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2015-09-21 15:27:39 +00:00
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#else
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2017-01-15 05:59:05 +00:00
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static inline void uniphier_sbc_init_admulti(void)
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2015-09-21 15:27:39 +00:00
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{
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}
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2017-01-15 05:59:05 +00:00
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static inline void uniphier_sbc_init_savepin(void)
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2015-09-21 15:27:39 +00:00
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{
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}
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2017-01-15 05:59:05 +00:00
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static inline void uniphier_ld4_sbc_init(void)
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2016-03-18 07:41:44 +00:00
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{
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}
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2017-01-15 05:59:05 +00:00
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static inline void uniphier_pxs2_sbc_init(void)
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{
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}
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static inline void uniphier_ld11_sbc_init(void)
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2015-09-21 15:27:41 +00:00
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{
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}
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2015-09-21 15:27:39 +00:00
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#endif
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2017-01-15 05:59:07 +00:00
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void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd);
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void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd);
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2015-09-21 15:27:39 +00:00
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2017-01-15 05:59:04 +00:00
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int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd);
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int uniphier_memconf_3ch_no_disbit_init(const struct uniphier_board_data *bd);
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int uniphier_memconf_3ch_init(const struct uniphier_board_data *bd);
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2016-03-30 11:17:02 +00:00
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2016-09-16 18:33:09 +00:00
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int uniphier_sld3_dpll_init(const struct uniphier_board_data *bd);
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int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd);
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int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd);
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int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd);
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2017-01-15 05:59:09 +00:00
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int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd);
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int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd);
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2016-09-21 22:42:19 +00:00
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int uniphier_ld11_dpll_init(const struct uniphier_board_data *bd);
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2016-09-16 18:33:11 +00:00
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int uniphier_ld20_dpll_init(const struct uniphier_board_data *bd);
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2016-03-30 11:17:02 +00:00
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2017-01-15 05:59:03 +00:00
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void uniphier_sld3_early_clk_init(void);
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void uniphier_ld11_early_clk_init(void);
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void uniphier_sld3_dram_clk_init(void);
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void uniphier_pro5_dram_clk_init(void);
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void uniphier_pxs2_dram_clk_init(void);
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void uniphier_ld11_dram_clk_init(void);
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void uniphier_ld20_dram_clk_init(void);
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2016-03-30 11:17:02 +00:00
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2017-01-15 05:59:09 +00:00
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int uniphier_sld3_umc_init(const struct uniphier_board_data *bd);
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2016-03-30 11:17:02 +00:00
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int uniphier_ld4_umc_init(const struct uniphier_board_data *bd);
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int uniphier_pro4_umc_init(const struct uniphier_board_data *bd);
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int uniphier_sld8_umc_init(const struct uniphier_board_data *bd);
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2017-01-15 05:59:09 +00:00
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int uniphier_pro5_umc_init(const struct uniphier_board_data *bd);
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2016-03-30 11:17:02 +00:00
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int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd);
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2016-04-21 05:43:18 +00:00
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int uniphier_ld20_umc_init(const struct uniphier_board_data *bd);
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2016-05-24 12:14:01 +00:00
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int uniphier_ld11_umc_init(const struct uniphier_board_data *bd);
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2016-03-30 11:17:02 +00:00
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2016-09-16 18:33:09 +00:00
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void uniphier_sld3_pll_init(void);
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void uniphier_ld4_pll_init(void);
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void uniphier_pro4_pll_init(void);
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2016-09-21 22:42:19 +00:00
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void uniphier_ld11_pll_init(void);
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2017-01-15 05:59:02 +00:00
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void uniphier_ld20_pll_init(void);
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2017-01-21 09:05:31 +00:00
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void uniphier_pxs3_pll_init(void);
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2016-09-16 18:33:09 +00:00
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2016-03-30 11:17:02 +00:00
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void uniphier_ld4_clk_init(void);
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void uniphier_pro4_clk_init(void);
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void uniphier_pro5_clk_init(void);
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void uniphier_pxs2_clk_init(void);
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2016-05-24 12:14:01 +00:00
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void uniphier_ld11_clk_init(void);
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2017-02-17 07:17:22 +00:00
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void uniphier_ld20_clk_init(void);
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2016-04-21 05:43:18 +00:00
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2017-02-13 16:24:26 +00:00
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unsigned int uniphier_boot_device_raw(void);
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2016-09-16 18:33:04 +00:00
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int uniphier_pin_init(const char *pinconfig_name);
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2016-09-13 16:06:08 +00:00
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void uniphier_smp_kick_all_cpus(void);
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2016-04-21 05:43:18 +00:00
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void cci500_init(int nr_slaves);
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2015-09-21 15:27:39 +00:00
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2017-02-13 16:24:26 +00:00
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#undef pr_warn
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ARM: uniphier: detect RAM size by decoding HW register instead of DT
U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.
Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.
Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-27 21:53:43 +00:00
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#define pr_warn(fmt, args...) printf(fmt, ##args)
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2017-02-13 16:24:26 +00:00
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#undef pr_err
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2015-09-21 15:27:39 +00:00
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#define pr_err(fmt, args...) printf(fmt, ##args)
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#endif /* __MACH_INIT_H */
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