u-boot/board/dhelectronics/dh_imx8mp/lpddr4_timing.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2022 Marek Vasut <marex@denx.de>
 */

#ifndef __LPDDR4_TIMING_H__
#define __LPDDR4_TIMING_H__

extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;

u8 dh_get_memcfg(void);

#endif /* __LPDDR4_TIMING_H__ */
ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2 Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> 2022-05-21 14:56:26 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
			`/*`
			`* Copyright 2022 Marek Vasut <marex@denx.de>`
			`*/`

			`#ifndef __LPDDR4_TIMING_H__`
			`#define __LPDDR4_TIMING_H__`

ARM: imx: Add 2 GiB DRAM support for DH electronics i.MX8M Plus DHCOM The DH electronics i.MX8M Plus DHCOM SoM currently supports only 4 GiB of DRAM population option. Add another population option with 2 GiB of DRAM. The chips used on the 2 GiB option are 2x K4F6E3S4HM-MGCJ . Signed-off-by: Marek Vasut <marex@denx.de> 2023-02-11 21:49:01 +00:00			`extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;`
ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2 Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> 2022-05-21 14:56:26 +00:00			`extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;`

			`u8 dh_get_memcfg(void);`

			`#endif /* __LPDDR4_TIMING_H__ */`