Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-05 20:54:31 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/arch/x86/lib/init_helpers.c

32 lines
627 B
C
Raw Normal View History

SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
// SPDX-License-Identifier: GPL-2.0+
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
2011-12-23 05:51:29 +00:00
/*
* (C) Copyright 2011
* Graeme Russ, <graeme.russ@gmail.com>
*/
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-13 07:29:10 +00:00
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
2011-12-23 05:51:29 +00:00
#include <common.h>
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-21 02:28:55 +00:00
#include <linux/errno.h>
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-01 23:18:11 +00:00
#include <asm/mtrr.h>
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
2011-12-23 05:51:29 +00:00
DECLARE_GLOBAL_DATA_PTR;
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-28 19:26:10 +00:00
/* Get the top of usable RAM */
__weak ulong board_get_usable_ram_top(ulong total_size)
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
2011-12-23 10:14:22 +00:00
{
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-28 19:26:10 +00:00
return gd->ram_size;
}
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
2011-12-23 10:14:22 +00:00
int init_cache_f_r(void)
{
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2019-06-18 16:06:34 +00:00
#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP)
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-01 23:18:11 +00:00
int ret;
ret = mtrr_commit(false);
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-01-22 03:29:41 +00:00
/* If MTRR MSR is not implemented by the processor, just ignore it */
if (ret && ret != -ENOSYS)
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-01 23:18:11 +00:00
return ret;
#endif
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
2011-12-23 10:14:22 +00:00
/* Initialise the CPU cache(s) */
return init_cache();
}
Reference in a new issue Copy permalink