2018-11-29 09:57:39 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* OMAP USB2 PHY LAYER
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com
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* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <errno.h>
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#include <generic-phy.h>
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#include <regmap.h>
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#include <syscon.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2020-02-03 14:36:15 +00:00
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#include <linux/err.h>
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2018-11-29 09:57:39 +00:00
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#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0)
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2020-06-03 11:46:22 +00:00
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#define OMAP_USB2_DISABLE_CHG_DET BIT(1)
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2018-11-29 09:57:39 +00:00
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#define OMAP_DEV_PHY_PD BIT(0)
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#define OMAP_USB2_PHY_PD BIT(28)
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2018-12-04 10:30:49 +00:00
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#define AM437X_USB2_PHY_PD BIT(0)
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#define AM437X_USB2_OTG_PD BIT(1)
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#define AM437X_USB2_OTGVDET_EN BIT(19)
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#define AM437X_USB2_OTGSESSEND_EN BIT(20)
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2018-11-29 09:57:39 +00:00
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#define USB2PHY_DISCON_BYP_LATCH BIT(31)
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#define USB2PHY_ANA_CONFIG1 (0x4c)
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2019-12-09 05:07:31 +00:00
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#define AM654_USB2_OTG_PD BIT(8)
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#define AM654_USB2_VBUS_DET_EN BIT(5)
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#define AM654_USB2_VBUSVALID_DET_EN BIT(4)
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2020-06-03 11:46:22 +00:00
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#define USB2PHY_CHRG_DET 0x14
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#define USB2PHY_USE_CHG_DET_REG BIT(29)
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#define USB2PHY_DIS_CHG_DET BIT(28)
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2018-11-29 09:57:39 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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struct omap_usb2_phy {
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struct regmap *pwr_regmap;
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ulong flags;
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void *phy_base;
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u32 pwr_reg_offset;
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};
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struct usb_phy_data {
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const char *label;
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u8 flags;
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u32 mask;
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u32 power_on;
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u32 power_off;
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};
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static const struct usb_phy_data omap5_usb2_data = {
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.label = "omap5_usb2",
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.flags = 0,
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.mask = OMAP_DEV_PHY_PD,
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.power_off = OMAP_DEV_PHY_PD,
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};
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static const struct usb_phy_data dra7x_usb2_data = {
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.label = "dra7x_usb2",
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.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
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.mask = OMAP_DEV_PHY_PD,
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.power_off = OMAP_DEV_PHY_PD,
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};
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static const struct usb_phy_data dra7x_usb2_phy2_data = {
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.label = "dra7x_usb2_phy2",
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.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
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.mask = OMAP_USB2_PHY_PD,
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.power_off = OMAP_USB2_PHY_PD,
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};
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2018-12-04 10:30:49 +00:00
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static const struct usb_phy_data am437x_usb2_data = {
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.label = "am437x_usb2",
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.flags = 0,
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.mask = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD |
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AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
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.power_on = AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
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.power_off = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD,
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};
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2019-12-09 05:07:31 +00:00
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static const struct usb_phy_data am654_usb2_data = {
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.label = "am654_usb2",
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.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
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.mask = AM654_USB2_OTG_PD | AM654_USB2_VBUS_DET_EN |
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AM654_USB2_VBUSVALID_DET_EN,
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.power_on = AM654_USB2_VBUS_DET_EN | AM654_USB2_VBUSVALID_DET_EN,
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.power_off = AM654_USB2_OTG_PD,
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};
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2018-11-29 09:57:39 +00:00
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static const struct udevice_id omap_usb2_id_table[] = {
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{
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.compatible = "ti,omap5-usb2",
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.data = (ulong)&omap5_usb2_data,
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},
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{
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.compatible = "ti,dra7x-usb2",
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.data = (ulong)&dra7x_usb2_data,
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},
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{
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.compatible = "ti,dra7x-usb2-phy2",
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.data = (ulong)&dra7x_usb2_phy2_data,
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},
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2018-12-04 10:30:49 +00:00
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{
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.compatible = "ti,am437x-usb2",
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.data = (ulong)&am437x_usb2_data,
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},
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{
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.compatible = "ti,am654-usb2",
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.data = (ulong)&am654_usb2_data,
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},
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2018-11-29 09:57:39 +00:00
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{},
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};
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static int omap_usb_phy_power(struct phy *usb_phy, bool on)
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{
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struct udevice *dev = usb_phy->dev;
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const struct usb_phy_data *data;
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const struct omap_usb2_phy *phy = dev_get_priv(dev);
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u32 val;
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int rc;
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data = (const struct usb_phy_data *)dev_get_driver_data(dev);
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if (!data)
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return -EINVAL;
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rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val);
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if (rc)
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return rc;
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val &= ~data->mask;
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if (on)
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val |= data->power_on;
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else
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val |= data->power_off;
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rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val);
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if (rc)
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return rc;
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return 0;
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}
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static int omap_usb2_phy_init(struct phy *usb_phy)
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{
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struct udevice *dev = usb_phy->dev;
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struct omap_usb2_phy *priv = dev_get_priv(dev);
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u32 val;
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if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
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/*
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*
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* Reduce the sensitivity of internal PHY by enabling the
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* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
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* resolves issues with certain devices which can otherwise
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* be prone to false disconnects.
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*
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*/
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val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);
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val |= USB2PHY_DISCON_BYP_LATCH;
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writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1);
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}
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2020-06-03 11:46:22 +00:00
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if (priv->flags & OMAP_USB2_DISABLE_CHG_DET) {
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val = readl(priv->phy_base + USB2PHY_CHRG_DET);
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val |= USB2PHY_USE_CHG_DET_REG | USB2PHY_DIS_CHG_DET;
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writel(val, priv->phy_base + USB2PHY_CHRG_DET);
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}
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2018-11-29 09:57:39 +00:00
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return 0;
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}
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static int omap_usb2_phy_power_on(struct phy *usb_phy)
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{
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return omap_usb_phy_power(usb_phy, true);
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}
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static int omap_usb2_phy_power_off(struct phy *usb_phy)
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{
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return omap_usb_phy_power(usb_phy, false);
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}
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static int omap_usb2_phy_exit(struct phy *usb_phy)
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{
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return omap_usb_phy_power(usb_phy, false);
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}
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struct phy_ops omap_usb2_phy_ops = {
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.init = omap_usb2_phy_init,
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.power_on = omap_usb2_phy_power_on,
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.power_off = omap_usb2_phy_power_off,
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.exit = omap_usb2_phy_exit,
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};
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int omap_usb2_phy_probe(struct udevice *dev)
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{
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int rc;
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struct regmap *regmap;
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struct omap_usb2_phy *priv = dev_get_priv(dev);
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const struct usb_phy_data *data;
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u32 tmp[2];
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data = (const struct usb_phy_data *)dev_get_driver_data(dev);
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if (!data)
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return -EINVAL;
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2020-06-03 11:46:22 +00:00
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priv->phy_base = dev_read_addr_ptr(dev);
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2018-11-29 09:57:39 +00:00
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2020-06-03 11:46:22 +00:00
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if (!priv->phy_base)
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return -EINVAL;
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if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT)
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2018-11-29 09:57:39 +00:00
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priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
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2020-06-03 11:46:22 +00:00
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/*
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* AM654x PG1.0 has a silicon bug that D+ is pulled high after
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* POR, which could cause enumeration failure with some USB hubs.
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* Disabling the USB2_PHY Charger Detect function will put D+
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* into the normal state.
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*
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* Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node
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* to enable this workaround for AM654x PG1.0.
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*/
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if (dev_read_bool(dev, "ti,dis-chg-det-quirk"))
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priv->flags |= OMAP_USB2_DISABLE_CHG_DET;
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2018-11-29 09:57:39 +00:00
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regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power");
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2018-12-04 10:30:49 +00:00
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if (!IS_ERR(regmap)) {
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priv->pwr_regmap = regmap;
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rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2);
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if (rc) {
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printf("couldn't get power reg. offset (err %d)\n", rc);
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return rc;
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}
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priv->pwr_reg_offset = tmp[1];
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return 0;
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2018-11-29 09:57:39 +00:00
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}
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2018-12-04 10:30:49 +00:00
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regmap = syscon_regmap_lookup_by_phandle(dev, "ctrl-module");
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if (!IS_ERR(regmap)) {
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priv->pwr_regmap = regmap;
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priv->pwr_reg_offset = 0;
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return 0;
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2018-11-29 09:57:39 +00:00
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}
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2018-12-04 10:30:49 +00:00
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printf("can't get regmap (err %ld)\n", PTR_ERR(regmap));
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return PTR_ERR(regmap);
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2018-11-29 09:57:39 +00:00
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}
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U_BOOT_DRIVER(omap_usb2_phy) = {
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.name = "omap_usb2_phy",
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.id = UCLASS_PHY,
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.of_match = omap_usb2_id_table,
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.probe = omap_usb2_phy_probe,
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.ops = &omap_usb2_phy_ops,
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.priv_auto_alloc_size = sizeof(struct omap_usb2_phy),
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};
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