2020-01-06 12:05:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019-2020 NXP
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*
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* PCIe DT fixup for NXP Layerscape SoCs
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* Author: Wasim Khan <wasim.khan@nxp.com>
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*
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*/
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#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
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#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
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#include <common.h>
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2020-06-26 06:13:33 +00:00
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void ft_pci_setup_ls(void *blob, struct bd_info *bd);
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2020-01-06 12:05:57 +00:00
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#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
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2020-06-26 06:13:33 +00:00
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void ft_pci_setup_ls_gen4(void *blob, struct bd_info *bd);
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2020-01-06 12:05:57 +00:00
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#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
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2020-01-06 12:05:59 +00:00
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int pcie_next_streamid(int currentid, int id);
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2020-01-06 12:06:00 +00:00
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int pcie_board_fix_fdt(void *fdt);
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2020-01-06 12:05:57 +00:00
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#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
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