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228 lines
5.8 KiB
C
228 lines
5.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef __TI_PRUSS_H
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#define __TI_PRUSS_H
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/*
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* PRU_ICSS_CFG registers
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* SYSCFG, ISRP, ISP, IESP, IECP, SCRP applicable on AMxxxx devices only
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*/
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#define PRUSS_CFG_REVID 0x00
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#define PRUSS_CFG_SYSCFG 0x04
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#define PRUSS_CFG_GPCFG(x) (0x08 + (x) * 4)
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#define PRUSS_CFG_CGR 0x10
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#define PRUSS_CFG_ISRP 0x14
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#define PRUSS_CFG_ISP 0x18
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#define PRUSS_CFG_IESP 0x1C
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#define PRUSS_CFG_IECP 0x20
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#define PRUSS_CFG_SCRP 0x24
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#define PRUSS_CFG_PMAO 0x28
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#define PRUSS_CFG_MII_RT 0x2C
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#define PRUSS_CFG_IEPCLK 0x30
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#define PRUSS_CFG_SPP 0x34
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#define PRUSS_CFG_PIN_MX 0x40
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/* PRUSS_GPCFG register bits */
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#define PRUSS_GPCFG_PRU_GPO_SH_SEL BIT(25)
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#define PRUSS_GPCFG_PRU_DIV1_SHIFT 20
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#define PRUSS_GPCFG_PRU_DIV1_MASK GENMASK(24, 20)
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#define PRUSS_GPCFG_PRU_DIV0_SHIFT 15
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#define PRUSS_GPCFG_PRU_DIV0_MASK GENMASK(15, 19)
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#define PRUSS_GPCFG_PRU_GPO_MODE BIT(14)
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#define PRUSS_GPCFG_PRU_GPO_MODE_DIRECT 0
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#define PRUSS_GPCFG_PRU_GPO_MODE_SERIAL BIT(14)
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#define PRUSS_GPCFG_PRU_GPI_SB BIT(13)
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#define PRUSS_GPCFG_PRU_GPI_DIV1_SHIFT 8
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#define PRUSS_GPCFG_PRU_GPI_DIV1_MASK GENMASK(12, 8)
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#define PRUSS_GPCFG_PRU_GPI_DIV0_SHIFT 3
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#define PRUSS_GPCFG_PRU_GPI_DIV0_MASK GENMASK(7, 3)
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#define PRUSS_GPCFG_PRU_GPI_CLK_MODE_POSITIVE 0
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#define PRUSS_GPCFG_PRU_GPI_CLK_MODE_NEGATIVE BIT(2)
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#define PRUSS_GPCFG_PRU_GPI_CLK_MODE BIT(2)
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#define PRUSS_GPCFG_PRU_GPI_MODE_MASK GENMASK(1, 0)
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#define PRUSS_GPCFG_PRU_GPI_MODE_SHIFT 0
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#define PRUSS_GPCFG_PRU_MUX_SEL_SHIFT 26
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#define PRUSS_GPCFG_PRU_MUX_SEL_MASK GENMASK(29, 26)
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/* PRUSS_MII_RT register bits */
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#define PRUSS_MII_RT_EVENT_EN BIT(0)
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/* PRUSS_SPP register bits */
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#define PRUSS_SPP_PRU1_PAD_HP_EN BIT(0)
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#define PRUSS_SPP_XFER_SHIFT_EN BIT(1)
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#define PRUSS_SPP_XFR_BYTE_SHIFT_EN BIT(2)
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#define PRUSS_SPP_RTU_XFR_SHIFT_EN BIT(3)
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/**
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* enum pruss_gp_mux_sel - PRUSS GPI/O Mux modes for the
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* PRUSS_GPCFG0/1 registers
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*
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* NOTE: The below defines are the most common values, but there
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* are some exceptions like on 66AK2G, where the RESERVED and MII2
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* values are interchanged. Also, this bit-field does not exist on
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* AM335x SoCs
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*/
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enum pruss_gp_mux_sel {
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PRUSS_GP_MUX_SEL_GP = 0,
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PRUSS_GP_MUX_SEL_ENDAT,
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PRUSS_GP_MUX_SEL_RESERVED,
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PRUSS_GP_MUX_SEL_SD,
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PRUSS_GP_MUX_SEL_MII2,
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PRUSS_GP_MUX_SEL_MAX,
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};
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/**
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* enum pruss_gpi_mode - PRUSS GPI configuration modes, used
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* to program the PRUSS_GPCFG0/1 registers
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*/
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enum pruss_gpi_mode {
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PRUSS_GPI_MODE_DIRECT = 0,
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PRUSS_GPI_MODE_PARALLEL,
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PRUSS_GPI_MODE_28BIT_SHIFT,
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PRUSS_GPI_MODE_MII,
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};
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/**
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* enum pruss_pru_id - PRU core identifiers
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*/
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enum pruss_pru_id {
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PRUSS_PRU0 = 0,
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PRUSS_PRU1,
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PRUSS_NUM_PRUS,
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};
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/**
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* enum pru_ctable_idx - Configurable Constant table index identifiers
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*/
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enum pru_ctable_idx {
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PRU_C24 = 0,
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PRU_C25,
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PRU_C26,
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PRU_C27,
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PRU_C28,
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PRU_C29,
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PRU_C30,
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PRU_C31,
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};
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/**
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* enum pruss_mem - PRUSS memory range identifiers
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*/
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enum pruss_mem {
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PRUSS_MEM_DRAM0 = 0,
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PRUSS_MEM_DRAM1,
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PRUSS_MEM_SHRD_RAM2,
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PRUSS_MEM_MAX,
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};
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/**
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* struct pruss_mem_region - PRUSS memory region structure
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* @va: kernel virtual address of the PRUSS memory region
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* @pa: physical (bus) address of the PRUSS memory region
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* @size: size of the PRUSS memory region
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*/
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struct pruss_mem_region {
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void __iomem *va;
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phys_addr_t pa;
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size_t size;
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};
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/**
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* struct pruss - PRUSS parent structure
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* @dev: pruss device pointer
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* @cfg: regmap for config region
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* @mem_regions: data for each of the PRUSS memory regions
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* @mem_in_use: to indicate if memory resource is in use
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*/
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struct pruss {
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struct udevice *dev;
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struct regmap *cfg;
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struct pruss_mem_region mem_regions[PRUSS_MEM_MAX];
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struct pruss_mem_region *mem_in_use[PRUSS_MEM_MAX];
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};
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int pruss_request_tm_region(struct udevice *dev, phys_addr_t *loc);
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int pruss_request_mem_region(struct udevice *dev, enum pruss_mem mem_id,
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struct pruss_mem_region *region);
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int pruss_release_mem_region(struct udevice *dev, struct pruss_mem_region *region);
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int pruss_cfg_update(struct udevice *dev, unsigned int reg,
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unsigned int mask, unsigned int val);
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/**
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* pruss_cfg_gpimode() - set the GPI mode of the PRU
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* @dev: the pruss device
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* @pru_id: the rproc instance handle of the PRU
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* @mode: GPI mode to set
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*
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* Sets the GPI mode for a given PRU by programming the
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* corresponding PRUSS_CFG_GPCFGx register
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*
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* Returns 0 on success, or an error code otherwise
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*/
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static inline int pruss_cfg_gpimode(struct udevice *dev, enum pruss_pru_id id,
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enum pruss_gpi_mode mode)
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{
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if (id < 0)
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return -EINVAL;
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return pruss_cfg_update(dev, PRUSS_CFG_GPCFG(id),
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PRUSS_GPCFG_PRU_GPI_MODE_MASK,
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mode << PRUSS_GPCFG_PRU_GPI_MODE_SHIFT);
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}
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/**
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* pruss_cfg_miirt_enable() - Enable/disable MII RT Events
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* @dev: the pruss device
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* @enable: enable/disable
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*
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* Enable/disable the MII RT Events for the PRUSS.
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*/
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static inline int pruss_cfg_miirt_enable(struct udevice *dev, bool enable)
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{
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u32 set = enable ? PRUSS_MII_RT_EVENT_EN : 0;
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return pruss_cfg_update(dev, PRUSS_CFG_MII_RT,
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PRUSS_MII_RT_EVENT_EN, set);
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}
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/**
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* pruss_cfg_xfr_enable() - Enable/disable XIN XOUT shift functionality
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* @dev: the pruss device
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* @enable: enable/disable
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*/
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static inline int pruss_cfg_xfr_enable(struct udevice *dev, bool enable)
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{
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u32 set = enable ? PRUSS_SPP_XFER_SHIFT_EN : 0;
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return pruss_cfg_update(dev, PRUSS_CFG_SPP,
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PRUSS_SPP_XFER_SHIFT_EN, set);
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}
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/**
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* pruss_cfg_set_gpmux() - set the GPMUX value for a PRU device
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* @pruss: pruss device
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* @pru_id: PRU identifier (0-1)
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* @mux: new mux value for PRU
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*/
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static inline int pruss_cfg_set_gpmux(struct udevice *dev,
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enum pruss_pru_id id, u8 mux)
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{
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if (mux >= PRUSS_GP_MUX_SEL_MAX)
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return -EINVAL;
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return pruss_cfg_update(dev, PRUSS_CFG_GPCFG(id),
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PRUSS_GPCFG_PRU_MUX_SEL_MASK,
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(u32)mux << PRUSS_GPCFG_PRU_MUX_SEL_SHIFT);
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}
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#endif /* __TI_PRUSS_H */
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