2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2016-08-12 09:58:12 +00:00
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/*
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* Copyright (c) 2016 Rockchip Electronics Co., Ltd
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*/
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#include <asm/io.h>
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2019-03-28 03:01:23 +00:00
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#include <asm/arch-rockchip/hardware.h>
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2019-03-29 01:09:03 +00:00
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#include <asm/arch-rockchip/grf_rk3288.h>
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2016-08-12 09:58:12 +00:00
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2019-03-29 01:09:03 +00:00
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#define GRF_BASE 0xff770000
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2016-08-12 09:58:12 +00:00
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int arch_cpu_init(void)
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{
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/* We do some SoC one time setting here. */
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2019-03-29 01:09:03 +00:00
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struct rk3288_grf * const grf = (void *)GRF_BASE;
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2016-08-12 09:58:12 +00:00
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/* Use rkpwm by default */
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2019-03-29 01:09:03 +00:00
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rk_setreg(&grf->soc_con2, 1 << 0);
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2016-08-12 09:58:12 +00:00
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return 0;
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}
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2019-03-29 01:09:04 +00:00
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#ifdef CONFIG_DEBUG_UART_BOARD_INIT
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void board_debug_uart_init(void)
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{
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/* Enable early UART on the RK3288 */
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struct rk3288_grf * const grf = (void *)GRF_BASE;
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rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
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GPIO7C6_MASK << GPIO7C6_SHIFT,
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GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
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GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
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}
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#endif
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