mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 01:17:39 +00:00
528 lines
12 KiB
Text
528 lines
12 KiB
Text
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2021 NXP
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*/
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/dts-v1/;
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#include "imx93.dtsi"
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/{
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chosen {
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stdout-path = &lpuart1;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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audio: audio@a4120000 {
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compatible = "shared-dma-pool";
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reg = <0 0xa4120000 0 0x100000>;
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no-map;
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};
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};
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reg_can2_stby: regulator-can2-stby {
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compatible = "regulator-fixed";
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regulator-name = "can2-stby";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&adp5585gpio 5 GPIO_ACTIVE_LOW>;
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enable-active-low;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usdhc3_pwrseq: usdhc3_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
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};
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reg_vref_1v8: regulator-adc-vref {
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compatible = "regulator-fixed";
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regulator-name = "vref_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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&lpi2c1 {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <400000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pinctrl_lpi2c1>;
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pinctrl-1 = <&pinctrl_lpi2c1>;
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status = "okay";
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ptn5110: tcpc@50 {
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compatible = "nxp,ptn5110";
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reg = <0x50>;
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interrupt-parent = <&pcal6524>;
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interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
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status = "okay";
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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typec1_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 20000, 3000)>;
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op-sink-microwatt = <15000000>;
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self-powered;
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};
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};
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ptn5110_2: tcpc@51 {
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compatible = "nxp,ptn5110";
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reg = <0x51>;
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interrupt-parent = <&pcal6524>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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status = "okay";
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port {
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typec2_dr_sw: endpoint {
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remote-endpoint = <&usb2_drd_sw>;
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};
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};
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typec2_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 20000, 3000)>;
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op-sink-microwatt = <15000000>;
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self-powered;
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};
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};
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};
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&lpi2c2 {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <400000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pinctrl_lpi2c2>;
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pinctrl-1 = <&pinctrl_lpi2c2>;
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9451a";
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reg = <0x25>;
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pinctrl-names = "default";
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interrupt-parent = <&pcal6524>;
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interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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buck1: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck2: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck4: BUCK4{
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regulator-name = "BUCK4";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5: BUCK5{
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regulator-name = "BUCK5";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6: BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo5: LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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pcal6524: gpio@22 {
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compatible = "nxp,pcal6524";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcal6524>;
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gpio3>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
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};
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adp5585gpio: gpio@34 {
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compatible = "adp5585";
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reg = <0x34>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&lpuart1 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&lpuart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "disabled";
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};
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&usbotg1 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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disable-over-current;
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usbotg2 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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disable-over-current;
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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status = "okay";
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port {
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usb2_drd_sw: endpoint {
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remote-endpoint = <&typec2_dr_sw>;
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};
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};
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1>;
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pinctrl-2 = <&pinctrl_usdhc1>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_usdhc2_vmmc>;
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bus-width = <4>;
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status = "okay";
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no-sdio;
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no-mmc;
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};
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&usdhc3 {
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status = "disabled";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy2>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <5000000>;
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ethphy2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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eee-broken-1000t;
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rtl821x,aldps-disable;
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rtl821x,clkout-disable;
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};
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};
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <5000000>;
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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eee-broken-1000t;
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rtl821x,aldps-disable;
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rtl821x,clkout-disable;
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};
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};
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};
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&flexspi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexspi>;
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status = "disabled";
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flash0: flash@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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status = "okay";
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
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MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
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>;
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};
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pinctrl_flexspi: flexspigrp {
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fsl,pins = <
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MX93_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x42
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MX93_PAD_SD1_DATA3__FLEXSPI1_A_SS1_B 0x42
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MX93_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x42
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MX93_PAD_SD1_STROBE__FLEXSPI1_A_DQS 0x42
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MX93_PAD_SD3_DATA0__FLEXSPI1_A_DATA00 0x42
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MX93_PAD_SD3_DATA1__FLEXSPI1_A_DATA01 0x42
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MX93_PAD_SD3_DATA2__FLEXSPI1_A_DATA02 0x42
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MX93_PAD_SD3_DATA3__FLEXSPI1_A_DATA03 0x42
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MX93_PAD_SD1_DATA4__FLEXSPI1_A_DATA04 0x42
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MX93_PAD_SD1_DATA5__FLEXSPI1_A_DATA05 0x42
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MX93_PAD_SD1_DATA6__FLEXSPI1_A_DATA06 0x42
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MX93_PAD_SD1_DATA7__FLEXSPI1_A_DATA07 0x42
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
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MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
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MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
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MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
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MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
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MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
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MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
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MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
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MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
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MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
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MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
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MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
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||
|
MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
|
||
|
MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_eqos: eqosgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
|
||
|
MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
|
||
|
MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
|
||
|
MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
|
||
|
MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
|
||
|
MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
|
||
|
MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe
|
||
|
MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
|
||
|
MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
|
||
|
MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
|
||
|
MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
|
||
|
MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
|
||
|
MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe
|
||
|
MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_lpi2c1: lpi2c1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
|
||
|
MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_lpi2c2: lpi2c2grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
|
||
|
MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pcal6524: pcal6524grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart1: uart1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
|
||
|
MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart2: uart2grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
|
||
|
MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc1: usdhc1grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD1_CLK__USDHC1_CLK 0x17fe
|
||
|
MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe
|
||
|
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
|
||
|
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
|
||
|
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
|
||
|
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
|
||
|
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
|
||
|
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
|
||
|
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
|
||
|
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
|
||
|
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x17fe
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
fsl,pins = <
|
||
|
MX93_PAD_SD2_CLK__USDHC2_CLK 0x17fe
|
||
|
MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
|
||
|
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
|
||
|
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
|
||
|
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
|
||
|
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
|
||
|
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
|
||
|
>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&wdog3 {
|
||
|
status = "okay";
|
||
|
};
|