u-boot/arch/arm/dts/bcm2836.dtsi

79 lines
1.5 KiB
Text
Raw Normal View History

#include "bcm283x.dtsi"
/ {
compatible = "brcm,bcm2836";
soc {
ranges = <0x7e000000 0x3f000000 0x1000000>,
<0x40000000 0x40000000 0x00001000>;
dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
local_intc: local_intc {
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&local_intc>;
};
arm-pmu {
compatible = "arm,cortex-a7-pmu";
interrupt-parent = <&local_intc>;
interrupts = <9>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;
interrupts = <0>, // PHYS_SECURE_PPI
<1>, // PHYS_NONSECURE_PPI
<3>, // VIRT_PPI
<2>; // HYP_PPI
always-on;
};
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
v7_cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf00>;
clock-frequency = <800000000>;
};
v7_cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf01>;
clock-frequency = <800000000>;
};
v7_cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf02>;
clock-frequency = <800000000>;
};
v7_cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf03>;
clock-frequency = <800000000>;
};
};
};
/* Make the BCM2835-style global interrupt controller be a child of the
* CPU-local interrupt controller.
*/
&intc {
compatible = "brcm,bcm2836-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-parent = <&local_intc>;
interrupts = <8>;
};