2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2016-08-10 07:08:49 +00:00
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/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <linux/linkage.h>
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#include <asm/system.h>
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.section ._secure.text, "ax"
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ENTRY(uniphier_smp_trampoline)
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ldr r0, 0f
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mrc p15, 0, r1, c1, c0, 0 @ SCTLR (System Control Register)
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orr r1, r1, #CR_I @ Enable ICache
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bic r1, r1, #(CR_C | CR_M) @ Disable MMU and Dcache
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mcr p15, 0, r1, c1, c0, 0
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bx r0
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0: .word uniphier_secondary_startup
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.globl uniphier_smp_trampoline_end
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uniphier_smp_trampoline_end:
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ENDPROC(uniphier_smp_trampoline)
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LENTRY(uniphier_secondary_startup)
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mrc p15, 0, r1, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg)
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and r1, r1, #0xff
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ldr r2, =uniphier_smp_booted
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mov r0, #1
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str r0, [r2, r1, lsl #2]
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ldr r2, =uniphier_psci_holding_pen_release
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pen: ldr r0, [r2]
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cmp r0, r1
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beq psci_cpu_entry
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wfe
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b pen
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ENDPROC(uniphier_secondary_startup)
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