2003-03-31 16:34:49 +00:00
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/*
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* linux/include/asm-arm/arch-at91/hardware.h
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*
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* Copyright (C) 2003 SAN People
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <asm/sizes.h>
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#ifndef __ASSEMBLY__
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#include "AT91RM9200.h"
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#else
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#include "AT91RM9200_inc.h"
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#endif
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/* Virtual and Physical base address for system peripherals */
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#define AT91_SYS_BASE 0xFFFFF000 /*4K */
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/* Virtual and Physical base addresses of user peripherals */
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#define AT91_SPI_BASE 0xFFFE0000 /*16K */
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#define AT91_SSC2_BASE 0xFFFD8000 /*16K */
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#define AT91_SSC1_BASE 0xFFFD4000 /*16K */
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#define AT91_SSC0_BASE 0xFFFD0000 /*16K */
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#define AT91_USART3_BASE 0xFFFCC000 /*16K */
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#define AT91_USART2_BASE 0xFFFC8000 /*16K */
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#define AT91_USART1_BASE 0xFFFC4000 /*16K */
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#define AT91_USART0_BASE 0xFFFC0000 /*16K */
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#define AT91_EMAC_BASE 0xFFFBC000 /*16K */
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#define AT91_TWI_BASE 0xFFFB8000 /*16K */
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#define AT91_MCI_BASE 0xFFFB4000 /*16K */
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#define AT91_UDP_BASE 0xFFFB0000 /*16K */
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#define AT91_TCB1_BASE 0xFFFA4000 /*16K */
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#define AT91_TCB0_BASE 0xFFFA0000 /*16K */
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2005-09-25 23:26:56 +00:00
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#define AT91_USB_HOST_BASE 0x00300000
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2003-03-31 16:34:49 +00:00
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/*
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* Where in virtual memory the IO devices (timers, system controllers
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* and so on)
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*/
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#define AT91_IO_BASE 0xF0000000 /* Virt/Phys Address of IO */
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/* FLASH */
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#define AT91_FLASH_BASE 0x10000000 /* NCS0 */
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/* SDRAM */
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#define AT91_SDRAM_BASE 0x20000000 /* NCS1 */
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/* SmartMedia */
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#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3 */
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/* Definition of interrupt priority levels */
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#define AT91C_AIC_PRIOR_0 AT91C_AIC_PRIOR_LOWEST
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#define AT91C_AIC_PRIOR_1 ((unsigned int) 0x1)
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#define AT91C_AIC_PRIOR_2 ((unsigned int) 0x2)
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#define AT91C_AIC_PRIOR_3 ((unsigned int) 0x3)
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#define AT91C_AIC_PRIOR_4 ((unsigned int) 0x4)
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#define AT91C_AIC_PRIOR_5 ((unsigned int) 0x5)
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#define AT91C_AIC_PRIOR_6 ((unsigned int) 0x6)
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#define AT91C_AIC_PRIOR_7 AT91C_AIC_PRIOR_HIGEST
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#endif
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