u-boot/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi

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// SPDX-License-Identifier: GPL-2.0+
/*
* U-Boot additions
*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
* Copyright (c) 2018 Simon Goldschmidt
*/
#include "socfpga-common-u-boot.dtsi"
/{
aliases {
spi0 = "/soc/spi@ff705000";
udc0 = &usb1;
};
};
&can0 {
status = "okay";
};
&watchdog0 {
status = "disabled";
};
&mmc {
bootph-all;
};
&qspi {
bootph-all;
};
&flash0 {
compatible = "n25q00", "jedec,spi-nor";
bootph-all;
partition@qspi-boot {
/* 8MB for raw data. */
label = "Flash 0 Raw Data";
reg = <0x0 0x800000>;
};
partition@qspi-rootfs {
/* 120MB for jffs2 data. */
label = "Flash 0 jffs2 Filesystem";
reg = <0x800000 0x7800000>;
};
};
&uart0 {
clock-frequency = <100000000>;
bootph-all;
};
&uart1 {
clock-frequency = <100000000>;
};
&porta {
bank-name = "porta";
};
&portb {
bank-name = "portb";
};
&portc {
bank-name = "portc";
};
&i2c0 {
i2c-scl-falling-time-ns = <300>;
};