u-boot/arch/x86/include/asm/cpu_common.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2016 Google, Inc
 */

#ifndef __ASM_CPU_COMMON_H
#define __ASM_CPU_COMMON_H

#define IA32_PERF_CTL			0x199

/**
 * cpu_common_init() - Set up common CPU init
 *
 * This reports BIST failure, enables the LAPIC, updates microcode, enables
 * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
 *
 * @return 0 if OK, -ve on error
 */
int cpu_common_init(void);

/**
 * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
 *
 * If a change is needed, this function will do a soft reset so it takes
 * effect.
 *
 * Some details are available here:
 * http://forum.hwbot.org/showthread.php?t=76092
 *
 * @return 0 if OK, -ve on error
 */
int cpu_set_flex_ratio_to_tdp_nominal(void);

#endif
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`
x86: Move common CPU code to its own place Some of the Intel CPU code is common to several Intel CPUs. Move it into a common location along with required declarations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:58 +00:00			`/*`
			`* Copyright (c) 2016 Google, Inc`
			`*/`

			`#ifndef __ASM_CPU_COMMON_H`
			`#define __ASM_CPU_COMMON_H`

			`#define IA32_PERF_CTL 0x199`

			`/**`
			`* cpu_common_init() - Set up common CPU init`
			`*`
			`* This reports BIST failure, enables the LAPIC, updates microcode, enables`
			`* the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.`
			`*`
			`* @return 0 if OK, -ve on error`
			`*/`
			`int cpu_common_init(void);`

			`/**`
			`* cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate`
			`*`
			`* If a change is needed, this function will do a soft reset so it takes`
			`* effect.`
			`*`
			`* Some details are available here:`
			`* http://forum.hwbot.org/showthread.php?t=76092`
			`*`
			`* @return 0 if OK, -ve on error`
			`*/`
			`int cpu_set_flex_ratio_to_tdp_nominal(void);`

			`#endif`