2008-03-28 09:00:33 +00:00
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/* Initializes CPU and basic hardware such as memory
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* controllers, IRQ controller and system timer 0.
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*
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2015-10-28 12:29:32 +00:00
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* (C) Copyright 2007, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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2008-03-28 09:00:33 +00:00
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2008-03-28 09:00:33 +00:00
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*/
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#include <common.h>
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#include <asm/asi.h>
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#include <asm/leon.h>
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2015-10-28 13:18:22 +00:00
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#include <asm/io.h>
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2008-03-28 09:00:33 +00:00
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#include <config.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Breath some life into the CPU...
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*
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* Set up the memory map,
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* initialize a bunch of registers.
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*
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* Run from FLASH/PROM:
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2011-02-03 21:04:26 +00:00
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* - until memory controller is set up, only registers available
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2008-03-28 09:00:33 +00:00
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* - no global variables available for writing
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2011-02-03 21:04:26 +00:00
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* - constants available
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2008-03-28 09:00:33 +00:00
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*/
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void cpu_init_f(void)
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{
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LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
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/* initialize the IRQMP */
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leon2->Interrupt_Force = 0;
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leon2->Interrupt_Pending = 0;
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leon2->Interrupt_Clear = 0xfffe; /* clear all old pending interrupts */
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leon2->Interrupt_Mask = 0xfffe0000; /* mask all IRQs */
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/* cache */
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2015-11-21 15:07:48 +00:00
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/* I/O port setup */
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2008-03-28 09:00:33 +00:00
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#ifdef LEON2_IO_PORT_DIR
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2015-11-21 15:07:48 +00:00
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leon2->PIO_Direction = LEON2_IO_PORT_DIR;
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2008-03-28 09:00:33 +00:00
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#endif
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#ifdef LEON2_IO_PORT_DATA
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2015-11-21 15:07:48 +00:00
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leon2->PIO_Data = LEON2_IO_PORT_DATA;
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2008-03-28 09:00:33 +00:00
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#endif
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#ifdef LEON2_IO_PORT_INT
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2015-11-21 15:07:48 +00:00
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leon2->PIO_Interrupt = LEON2_IO_PORT_INT;
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2008-03-28 09:00:33 +00:00
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#else
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2015-11-21 15:07:48 +00:00
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leon2->PIO_Interrupt = 0;
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2008-03-28 09:00:33 +00:00
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#endif
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2015-10-28 13:18:22 +00:00
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/* disable timers */
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leon2->Timer_Control_1 = leon2->Timer_Control_2 = 0;
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2008-03-28 09:00:33 +00:00
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}
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2015-10-28 12:29:32 +00:00
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int arch_cpu_init(void)
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{
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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gd->bus_clk = CONFIG_SYS_CLK_FREQ;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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2008-03-28 09:00:33 +00:00
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/*
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2015-10-28 13:18:22 +00:00
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* initialize higher level parts of CPU
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2008-03-28 09:00:33 +00:00
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*/
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int cpu_init_r(void)
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{
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2015-10-28 13:18:22 +00:00
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return 0;
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2008-03-28 09:00:33 +00:00
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}
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2015-11-21 21:15:07 +00:00
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/* initiate and setup timer0 to configured HZ. Base clock is 1MHz.
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2008-03-28 09:00:33 +00:00
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*/
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2015-10-28 13:18:22 +00:00
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int timer_init(void)
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{
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LEON2_regs *leon2 = (LEON2_regs *)LEON2_PREGS;
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/* initialize prescaler common to all timers to 1MHz */
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leon2->Scaler_Counter = leon2->Scaler_Reload =
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(((CONFIG_SYS_CLK_FREQ / 1000) + 500) / 1000) - 1;
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/* SYS_HZ ticks per second */
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leon2->Timer_Counter_1 = 0;
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leon2->Timer_Reload_1 = (CONFIG_SYS_TIMER_RATE / CONFIG_SYS_HZ) - 1;
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leon2->Timer_Control_1 = LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS |
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LEON2_TIMER_CTRL_LD;
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CONFIG_SYS_TIMER_COUNTER = (void *)&leon2->Timer_Counter_1;
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return 0;
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}
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