2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-03-26 19:40:42 +00:00
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/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*/
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#include <common.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2011-03-14 14:43:56 +00:00
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#include <asm/arch/imx-regs.h>
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2011-02-02 00:49:36 +00:00
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#include <asm/io.h>
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2008-03-26 19:40:42 +00:00
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#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
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/* General purpose timers registers */
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2008-09-25 18:54:37 +00:00
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#define GPTCR __REG(TIMER_BASE) /* Control register */
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#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
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#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
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#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
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2008-03-26 19:40:42 +00:00
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/* General purpose timers bitfields */
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2008-09-25 18:54:37 +00:00
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#define GPTCR_SWR (1 << 15) /* Software reset */
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#define GPTCR_FRR (1 << 9) /* Freerun / restart */
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#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
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#define GPTCR_TEN 1 /* Timer enable */
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/* The 32768Hz 32-bit timer overruns in 131072 seconds */
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2011-10-13 05:34:59 +00:00
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int timer_init(void)
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2008-03-26 19:40:42 +00:00
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{
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int i;
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/* setup GP Timer 1 */
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GPTCR = GPTCR_SWR;
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2008-09-25 18:54:37 +00:00
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for (i = 0; i < 100; i++)
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GPTCR = 0; /* We have no udelay by now */
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2008-03-26 19:40:42 +00:00
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GPTPR = 0; /* 32Khz */
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2008-09-25 18:54:37 +00:00
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/* Freerun Mode, PERCLK1 input */
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GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
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2008-03-26 19:40:42 +00:00
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return 0;
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}
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2014-08-12 14:26:00 +00:00
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unsigned long timer_read_counter(void)
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2012-02-04 12:02:01 +00:00
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{
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2014-08-12 14:26:00 +00:00
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return GPTCNT;
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2012-02-04 12:02:01 +00:00
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}
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