2018-05-06 21:58:06 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
2017-06-01 10:00:55 +00:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
|
|
|
*/
|
|
|
|
#ifndef __CONFIG_RV1108_COMMON_H
|
|
|
|
#define __CONFIG_RV1108_COMMON_H
|
|
|
|
|
|
|
|
#include <asm/arch/hardware.h>
|
|
|
|
#include "rockchip-common.h"
|
|
|
|
|
|
|
|
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
|
|
|
|
#define CONFIG_SYS_CBSIZE 1024
|
|
|
|
#define CONFIG_SKIP_LOWLEVEL_INIT
|
|
|
|
|
|
|
|
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
|
|
|
|
/* TIMER1,initialized by ddr initialize code */
|
|
|
|
#define CONFIG_SYS_TIMER_BASE 0x10350020
|
|
|
|
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
|
|
|
|
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE 0x60000000
|
|
|
|
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
|
|
|
|
|
2017-08-09 03:36:27 +00:00
|
|
|
/* rockchip ohci host driver */
|
|
|
|
#define CONFIG_USB_OHCI_NEW
|
|
|
|
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
|
2017-06-01 10:00:55 +00:00
|
|
|
#endif
|