2013-02-07 02:10:11 +00:00
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/*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2013-02-07 02:10:11 +00:00
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*/
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#define SDRAM_DDR /* is DDR */
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#if defined(CONFIG_MPC5200)
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/* Settings for XLB = 132 MHz */
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/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */
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/* SDRAM Config Standard timing */
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#define SDRAM_MODE 0x008d0000
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#define SDRAM_EMODE 0x40010000
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#define SDRAM_CONTROL 0x70430f00
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#define SDRAM_CONFIG1 0x33622930
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#define SDRAM_CONFIG2 0x46670000
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#define SDRAM_TAPDELAY 0x10000000
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#else
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#error CONFIG_MPC5200 not defined
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#endif
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