2018-05-06 22:27:01 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
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2015-04-29 02:25:10 +00:00
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/*
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* Copyright(c) 2009 Intel Corporation. All rights reserved.
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*/
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#ifndef _LINUX_SFI_H
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#define _LINUX_SFI_H
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#include <errno.h>
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#include <linux/types.h>
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/* Table signatures reserved by the SFI specification */
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#define SFI_SIG_SYST "SYST"
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#define SFI_SIG_FREQ "FREQ"
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#define SFI_SIG_CPUS "CPUS"
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#define SFI_SIG_MTMR "MTMR"
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#define SFI_SIG_MRTC "MRTC"
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#define SFI_SIG_MMAP "MMAP"
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#define SFI_SIG_APIC "APIC"
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#define SFI_SIG_XSDT "XSDT"
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#define SFI_SIG_WAKE "WAKE"
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#define SFI_SIG_DEVS "DEVS"
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#define SFI_SIG_GPIO "GPIO"
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#define SFI_SIGNATURE_SIZE 4
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#define SFI_OEM_ID_SIZE 6
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#define SFI_OEM_TABLE_ID_SIZE 8
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#define SFI_NAME_LEN 16
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#define SFI_TABLE_MAX_ENTRIES 16
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#define SFI_GET_NUM_ENTRIES(ptable, entry_type) \
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((ptable->header.len - sizeof(struct sfi_table_header)) / \
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(sizeof(entry_type)))
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/*
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* Table structures must be byte-packed to match the SFI specification,
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* as they are provided by the BIOS.
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*/
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struct __packed sfi_table_header {
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char sig[SFI_SIGNATURE_SIZE];
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u32 len;
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u8 rev;
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u8 csum;
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char oem_id[SFI_OEM_ID_SIZE];
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char oem_table_id[SFI_OEM_TABLE_ID_SIZE];
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};
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struct __packed sfi_table_simple {
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struct sfi_table_header header;
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u64 pentry[1];
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};
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/* Comply with UEFI spec 2.1 */
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struct __packed sfi_mem_entry {
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u32 type;
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u64 phys_start;
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u64 virt_start;
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u64 pages;
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u64 attrib;
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};
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2017-07-06 11:41:52 +00:00
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/* Memory type definitions */
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enum sfi_mem_type {
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SFI_MEM_RESERVED,
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SFI_LOADER_CODE,
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SFI_LOADER_DATA,
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SFI_BOOT_SERVICE_CODE,
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SFI_BOOT_SERVICE_DATA,
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SFI_RUNTIME_SERVICE_CODE,
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SFI_RUNTIME_SERVICE_DATA,
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SFI_MEM_CONV,
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SFI_MEM_UNUSABLE,
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SFI_ACPI_RECLAIM,
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SFI_ACPI_NVS,
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SFI_MEM_MMIO,
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SFI_MEM_IOPORT,
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SFI_PAL_CODE,
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SFI_MEM_TYPEMAX,
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};
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2015-04-29 02:25:10 +00:00
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struct __packed sfi_cpu_table_entry {
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u32 apic_id;
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};
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struct __packed sfi_cstate_table_entry {
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u32 hint; /* MWAIT hint */
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u32 latency; /* latency in ms */
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};
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struct __packed sfi_apic_table_entry {
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u64 phys_addr; /* phy base addr for APIC reg */
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};
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struct __packed sfi_freq_table_entry {
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u32 freq_mhz; /* in MHZ */
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u32 latency; /* transition latency in ms */
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u32 ctrl_val; /* value to write to PERF_CTL */
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};
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struct __packed sfi_wake_table_entry {
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u64 phys_addr; /* pointer to where the wake vector locates */
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};
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struct __packed sfi_timer_table_entry {
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u64 phys_addr; /* phy base addr for the timer */
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u32 freq_hz; /* in HZ */
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u32 irq;
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};
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struct __packed sfi_rtc_table_entry {
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u64 phys_addr; /* phy base addr for the RTC */
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u32 irq;
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};
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struct __packed sfi_device_table_entry {
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u8 type; /* bus type, I2C, SPI or ...*/
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u8 host_num; /* attached to host 0, 1...*/
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u16 addr;
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u8 irq;
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u32 max_freq;
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char name[SFI_NAME_LEN];
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};
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enum {
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SFI_DEV_TYPE_SPI = 0,
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SFI_DEV_TYPE_I2C,
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SFI_DEV_TYPE_UART,
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SFI_DEV_TYPE_HSI,
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SFI_DEV_TYPE_IPC,
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SFI_DEV_TYPE_SD,
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};
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struct __packed sfi_gpio_table_entry {
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char controller_name[SFI_NAME_LEN];
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u16 pin_no;
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char pin_name[SFI_NAME_LEN];
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};
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struct sfi_xsdt_header {
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uint32_t oem_revision;
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uint32_t creator_id;
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uint32_t creator_revision;
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};
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typedef int (*sfi_table_handler) (struct sfi_table_header *table);
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/**
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* write_sfi_table() - Write Simple Firmware Interface tables
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*
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* @base: Address to write table to
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* @return address to use for the next table
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*/
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2017-01-16 14:03:35 +00:00
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ulong write_sfi_table(ulong base);
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2015-04-29 02:25:10 +00:00
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#endif /*_LINUX_SFI_H */
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