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u-boot/drivers/clk/rockchip/Makefile

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drivers: cosmetic: Convert SPDX license tags to Linux Kernel style Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style"). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-26 09:02:52 +02:00
# SPDX-License-Identifier: GPL-2.0+
move: rockchip: move clock drivers into a subdirectory With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-29 14:47:21 +02:00
#
rockchip: rk3128: add clock driver Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-28 16:04:17 +08:00
# Copyright (c) 2017 Rockchip Electronics Co., Ltd
move: rockchip: move clock drivers into a subdirectory With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-29 14:47:21 +02:00
#
rockchip: clk: pll: add common pll setting funcs Common PLL setup function, compatible with different SOC. Mainly for the subsequent new SOC use. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-25 09:42:17 +08:00
obj-y += clk_pll.o
rockchip: clk: add px30 clock driver The px30 contains 2 separate clock controllers, pmucru and cru. Add drivers for them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-11 10:42:16 +02:00
obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
move: rockchip: move clock drivers into a subdirectory With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-29 14:47:21 +02:00
obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
rockchip: rk3066: add clock driver for rk3066 soc Add the clock driver for the rk3066 platform. Derived from the rk3288 and rk3188 driver it supports only a bare minimum to bring up the system to reduce the TPL size for: SDRAM clock configuration. The boot devices NAND, EMMC, SDMMC, SPI. A UART for the debug messages (fixed) at 115200n8. A SARADC for the recovery button. A TIMER for the delays (fixed). There's support for two possible frequencies, the safe 600MHz which will work with default pmic settings and will be set to get away from the 24MHz default and the maximum of 1.416Ghz, which boards can set if they were able to get pmic support for it. After the clock tree is set during the TPL probe there's no parent update support. In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c obtain the (fixed) clk_get_rate from the clock driver instead of platdata. The rk3066 cru node has a number of assigned-clocks properties that call the .set_rate() function. Add them to the list so that they return a 0 instead of -ENOENT. Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-16 17:09:39 +02:00
obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
rockchip: rk3128: add clock driver Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-28 16:04:17 +08:00
obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
rockchip: rk3188: Add clock driver Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-02-18 19:46:34 +01:00
obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
rockchip: rk322x: add clock driver Add clock driver init support for: - cpu, bus clock init; - emmc, sdmmc clock; - ddr clock; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixed format specified (%x -> %p) in clk_rk322x.c: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-23 17:17:49 +08:00
obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
move: rockchip: move clock drivers into a subdirectory With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-29 14:47:21 +02:00
obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
rockchip: clk: Add clk driver for rk3308 Add clk controller driver for RK3308 SOC. This patch depends on Elaine's pll patch[0]. [0]http://patchwork.ozlabs.org/patch/1183718/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-14 11:21:13 +08:00
obj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o
rockchip: rk3328: add clock driver Add rk3328 clock driver and cru structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-02-23 15:37:52 +08:00
obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
rockchip: rk3368: Add clock driver Add driver to setup the various PLLs and peripheral clocks on the RK3368. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:49:56 +08:00
obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
move: rockchip: move clock drivers into a subdirectory With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-29 14:47:21 +02:00
obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
rockchip: rk3568: add clock driver Add rk3568 clock driver and cru structure definition. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-02 11:39:24 +08:00
obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
clk: rockchip: Add rk3588 clk support Add clock driver support for Rockchip RK3588 SoC. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-30 20:27:36 +05:30
obj-$(CONFIG_ROCKCHIP_RK3588) += clk_rk3588.o
rockchip: clk: Add rv1108 clock driver Add clock driver support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-01 18:00:36 +08:00
obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
clk: rockchip: Add rv1126 clk support Add clock driver support for Rockchip RV1126 SoC. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-14 23:21:00 +05:30
obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
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