mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-28 05:53:54 +00:00
71 lines
2.2 KiB
C
71 lines
2.2 KiB
C
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
||
|
|
/*
|
||
|
|
* Copyright (C) ASPEED Technology Inc.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifndef _ABI_MACH_ASPEED_AST2600_RESET_H_
|
||
|
|
#define _ABI_MACH_ASPEED_AST2600_RESET_H_
|
||
|
|
|
||
|
|
#define ASPEED_RESET_FSI (59)
|
||
|
|
#define ASPEED_RESET_RESERVED58 (58)
|
||
|
|
#define ASPEED_RESET_RESERVED57 (57)
|
||
|
|
#define ASPEED_RESET_SD (56)
|
||
|
|
#define ASPEED_RESET_ADC (55)
|
||
|
|
#define ASPEED_RESET_JTAG_MASTER2 (54)
|
||
|
|
#define ASPEED_RESET_MAC4 (53)
|
||
|
|
#define ASPEED_RESET_MAC3 (52)
|
||
|
|
#define ASPEED_RESET_RESERVE51 (51)
|
||
|
|
#define ASPEED_RESET_RESERVE50 (50)
|
||
|
|
#define ASPEED_RESET_RESERVE49 (49)
|
||
|
|
#define ASPEED_RESET_RESERVE48 (48)
|
||
|
|
#define ASPEED_RESET_RESERVE47 (47)
|
||
|
|
#define ASPEED_RESET_RESERVE46 (46)
|
||
|
|
#define ASPEED_RESET_I3C5 (45)
|
||
|
|
#define ASPEED_RESET_I3C4 (44)
|
||
|
|
#define ASPEED_RESET_I3C3 (43)
|
||
|
|
#define ASPEED_RESET_I3C2 (42)
|
||
|
|
#define ASPEED_RESET_I3C1 (41)
|
||
|
|
#define ASPEED_RESET_I3C0 (40)
|
||
|
|
#define ASPEED_RESET_I3C_DMA (39)
|
||
|
|
#define ASPEED_RESET_RESERVED38 (38)
|
||
|
|
#define ASPEED_RESET_PWM (37)
|
||
|
|
#define ASPEED_RESET_PECI (36)
|
||
|
|
#define ASPEED_RESET_MII (35)
|
||
|
|
#define ASPEED_RESET_I2C (34)
|
||
|
|
#define ASPEED_RESET_RESERVED33 (33)
|
||
|
|
#define ASPEED_RESET_LPC_ESPI (32)
|
||
|
|
#define ASPEED_RESET_H2X (31)
|
||
|
|
#define ASPEED_RESET_GP_MCU (30)
|
||
|
|
#define ASPEED_RESET_DP_MCU (29)
|
||
|
|
#define ASPEED_RESET_DP (28)
|
||
|
|
#define ASPEED_RESET_RC_XDMA (27)
|
||
|
|
#define ASPEED_RESET_GRAPHICS (26)
|
||
|
|
#define ASPEED_RESET_DEV_XDMA (25)
|
||
|
|
#define ASPEED_RESET_DEV_MCTP (24)
|
||
|
|
#define ASPEED_RESET_RC_MCTP (23)
|
||
|
|
#define ASPEED_RESET_JTAG_MASTER (22)
|
||
|
|
#define ASPEED_RESET_PCIE_DEV_OE (21)
|
||
|
|
#define ASPEED_RESET_PCIE_DEV_O (20)
|
||
|
|
#define ASPEED_RESET_PCIE_RC_OE (19)
|
||
|
|
#define ASPEED_RESET_PCIE_RC_O (18)
|
||
|
|
#define ASPEED_RESET_RESERVED17 (17)
|
||
|
|
#define ASPEED_RESET_EMMC (16)
|
||
|
|
#define ASPEED_RESET_UHCI (15)
|
||
|
|
#define ASPEED_RESET_EHCI_P1 (14)
|
||
|
|
#define ASPEED_RESET_CRT (13)
|
||
|
|
#define ASPEED_RESET_MAC2 (12)
|
||
|
|
#define ASPEED_RESET_MAC1 (11)
|
||
|
|
#define ASPEED_RESET_RESERVED10 (10)
|
||
|
|
#define ASPEED_RESET_RVAS (9)
|
||
|
|
#define ASPEED_RESET_PCI_VGA (8)
|
||
|
|
#define ASPEED_RESET_2D (7)
|
||
|
|
#define ASPEED_RESET_VIDEO (6)
|
||
|
|
#define ASPEED_RESET_PCI_DP (5)
|
||
|
|
#define ASPEED_RESET_HACE (4)
|
||
|
|
#define ASPEED_RESET_EHCI_P2 (3)
|
||
|
|
#define ASPEED_RESET_RESERVED2 (2)
|
||
|
|
#define ASPEED_RESET_AHB (1)
|
||
|
|
#define ASPEED_RESET_SDRAM (0)
|
||
|
|
|
||
|
|
#endif /* _ABI_MACH_ASPEED_AST2600_RESET_H_ */
|