u-boot/arch/x86/include/asm/intel_regs.h

/*
 * Copyright (c) 2016 Google, Inc
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#ifndef __ASM_INTEL_REGS_H
#define __ASM_INTEL_REGS_H

/* Access the memory-controller hub */
#define MCH_BASE_ADDRESS	0xfed10000
#define MCH_BASE_SIZE		0x8000
#define MCHBAR_REG(reg)		(MCH_BASE_ADDRESS + (reg))

#define MCHBAR_PEI_VERSION	0x5034
#define MCH_PKG_POWER_LIMIT_LO	0x59a0
#define MCH_PKG_POWER_LIMIT_HI	0x59a4
#define MCH_DDR_POWER_LIMIT_LO	0x58e0
#define MCH_DDR_POWER_LIMIT_HI	0x58e4

/* Access the Root Complex Register Block */
#define RCB_BASE_ADDRESS	0xfed1c000
#define RCB_REG(reg)		(RCB_BASE_ADDRESS + (reg))

#define SOFT_RESET_CTRL		0x38f4
#define SOFT_RESET_DATA		0x38f8

#endif
x86: Create a common header for Intel register access There are several blocks of registers that are accessed from all over the code on Intel CPUs. These don't currently have their own driver and it is not clear whether having a driver makes sense. An example is the Memory Controller Hub (MCH). We map it to a known location on some Intel chips (mostly those without FSP - Firmware Support Package). Add a new header file for these registers, and move MCH into it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:55 +00:00			`/*`
			`* Copyright (c) 2016 Google, Inc`
			`*`
			`* SPDX-License-Identifier: GPL-2.0`
			`*/`

			`#ifndef __ASM_INTEL_REGS_H`
			`#define __ASM_INTEL_REGS_H`

			`/* Access the memory-controller hub */`
			`#define MCH_BASE_ADDRESS 0xfed10000`
			`#define MCH_BASE_SIZE 0x8000`
			`#define MCHBAR_REG(reg) (MCH_BASE_ADDRESS + (reg))`

x86: Move common CPU code to its own place Some of the Intel CPU code is common to several Intel CPUs. Move it into a common location along with required declarations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:58 +00:00			`#define MCHBAR_PEI_VERSION 0x5034`
			`#define MCH_PKG_POWER_LIMIT_LO 0x59a0`
			`#define MCH_PKG_POWER_LIMIT_HI 0x59a4`
			`#define MCH_DDR_POWER_LIMIT_LO 0x58e0`
			`#define MCH_DDR_POWER_LIMIT_HI 0x58e4`

x86: Add the root-complex block to common intel registers This is similar to MCH in that it is used in various drivers. Add it to the common header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:56 +00:00			`/* Access the Root Complex Register Block */`
			`#define RCB_BASE_ADDRESS 0xfed1c000`
			`#define RCB_REG(reg) (RCB_BASE_ADDRESS + (reg))`

x86: Move common CPU code to its own place Some of the Intel CPU code is common to several Intel CPUs. Move it into a common location along with required declarations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:58 +00:00			`#define SOFT_RESET_CTRL 0x38f4`
			`#define SOFT_RESET_DATA 0x38f8`

x86: Create a common header for Intel register access There are several blocks of registers that are accessed from all over the code on Intel CPUs. These don't currently have their own driver and it is not clear whether having a driver makes sense. An example is the Memory Controller Hub (MCH). We map it to a known location on some Intel chips (mostly those without FSP - Firmware Support Package). Add a new header file for these registers, and move MCH into it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2016-03-12 05:06:55 +00:00			`#endif`