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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
# SPDX-License-Identifier: GPL-2.0+
drivers/misc : move misc drivers to drivers/misc Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-24 20:17:55 +00:00
#
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
dm: implement a Miscellaneous uclass Implement a Miscellaneous uclass with generic read or write operations. This class is used only for those do not fit other more general classes. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
2015-10-07 12:20:51 +00:00
obj-$(CONFIG_MISC) += misc-uclass.o
spl: misc: Allow misc drivers in SPL and TPL In some cases it is necessary to read the keyboard in early phases of U-Boot. The cros_ec keyboard is kept in the misc directory. Update the config to allow this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-18 15:14:27 +00:00
obj-$(CONFIG_$(SPL_TPL_)CROS_EC) += cros_ec.o
obj-$(CONFIG_$(SPL_TPL_)CROS_EC_SANDBOX) += cros_ec_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o
cros_ec: Disable the Chrome OS EC in SPL This is not used in SPL so don't allow it to be built there, even if I2C is enabled in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22 02:43:52 +00:00
ifndef CONFIG_SPL_BUILD
sandbox: Add PCI driver and test for p2sb Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:41:57 +00:00
obj-$(CONFIG_SANDBOX) += sandbox_adder.o
drivers: convert makefiles to Kbuild style Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-17 08:34:57 +00:00
obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
sandbox: Add PCI driver and test for p2sb Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:41:57 +00:00
obj-$(CONFIG_SANDBOX) += p2sb_sandbox.o p2sb_emul.o
sandbox: pci: Create a new sandbox_pci_read_bar() function The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-25 14:56:42 +00:00
obj-$(CONFIG_SANDBOX) += swap_case.o
Kconfig: Move CONFIG_FIT and related options to Kconfig There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this. Move these options to Kconfig and tidy up board configuration: CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL. Note: Masahiro's moveconfig.py script is amazing. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-02-23 05:55:43 +00:00
endif
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
dm: i2c: allow disabling driver model in SPL At present if U-Boot proper uses driver model for I2C, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. This patch introduces a separate Kconfig symbols for enabling DM_I2C and DM_I2C_GPIO support in SPL. This will also help to get away from dirty workarounds to achieve non-DM I2C support for SPL, which is currently used in some board header files like: ifdef CONFIG_SPL_BUILD undef CONFIG_DM_I2C endif Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-09 11:52:43 +00:00
ifdef CONFIG_$(SPL_)DM_I2C
sandbox: Don't bring in the eeprom emulator in SPL This driver should not be used in SPL since we do not have I2C support enabled in SPL on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-04 17:58:19 +00:00
ifndef CONFIG_SPL_BUILD
dm: i2c: Add an I2C EEPROM simulator To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox. It supports reading and writing from a small data store. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-10 15:55:51 +00:00
obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
endif
sandbox: Don't bring in the eeprom emulator in SPL This driver should not be used in SPL since we do not have I2C support enabled in SPL on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-04 17:58:19 +00:00
endif
dm: sandbox: Add a simple driver to test of-platdata Add a driver which uses of-platdata to obtain its platform data. This can be used to test the feature in sandbox. It displays the contents of its platform data. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-04 17:58:01 +00:00
ifdef CONFIG_SPL_OF_PLATDATA
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
endif
endif
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_ALI152X) += ali512x.o
obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
obj-$(CONFIG_DS4510) += ds4510.o
obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
Driver/IFC: Move Freescale IFC driver to a common driver Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/misc and fix the header file includes. Signed-off-by: York Sun <yorksun@freescale.com>
2013-10-22 19:39:02 +00:00
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
fsl_sec_mon: Add driver for Security Monitor block of Freescale The Security Monitor is the SOC’s central reporting point for security-relevant events such as the success or failure of boot software validation and the detection of potential security compromises. The API's for transition of Security states have been added which will be used in case of SECURE BOOT. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-27 04:14:22 +00:00
obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_FS_LOADER) += fs_loader.o
obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
misc: Add gdsys_soc driver This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-10-04 07:00:54 +00:00
obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
x86: Move UCLASS_IRQ into a separate file Update this uclass to support the needs of the Apollo Lake ITSS. It supports four operations. Move the uclass into a separate directory so that sandbox can use it too. Add a new Kconfig to control it and enable this on x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:41:58 +00:00
obj-$(CONFIG_IRQ) += irq-uclass.o
sandbox: Add a test for IRQ Add a simple sandbox test for this uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:41:59 +00:00
obj-$(CONFIG_SANDBOX) += irq_sandbox.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
misc: Add IHS FPGA driver Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which supports initialization of the FPGA, as well as information gathering. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-10-04 07:00:55 +00:00
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_IMX8) += imx8/
driver: misc: Add MU and S400 API to communicate with Sentinel Add MU driver and S400 API. Need enable MISC driver to work Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-07 08:00:41 +00:00
obj-$(CONFIG_IMX8ULP) += imx8ulp/
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
pci: Add support for p2sb uclass The Primary-to-Sideband bus (P2SB) is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added in the device tree as subnodes of the p2sb. This adds a uclass and enables it for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:41:55 +00:00
obj-$(CONFIG_P2SB) += p2sb-uclass.o
misc: led: Add PCA9551 LED driver This patch adds a driver for the PCA9551 LED controller. Originated-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Cc: Fabio Estevam <festevam@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-12 10:22:46 +00:00
obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
x86: qemu: move QFW to its own uclass We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19 07:21:40 +00:00
ifdef CONFIG_QFW
obj-y += qfw.o
obj-$(CONFIG_QFW_PIO) += qfw_pio.o
qemu: add MMIO driver for QFW Add MMIO driver for QFW. Note that there is no consumer as of this patch. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19 07:21:42 +00:00
obj-$(CONFIG_QFW_MMIO) += qfw_mmio.o
test: qemu: add qfw sandbox driver, dm tests, qemu tests A sandbox driver and test are added for the qfw uclass, and a test in QEMU added for qfw functionality to confirm it doesn't break in real world use. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19 07:21:41 +00:00
obj-$(CONFIG_SANDBOX) += qfw_sandbox.o
x86: qemu: move QFW to its own uclass We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19 07:21:40 +00:00
endif
rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block This adds a simple driver for reading the efuse block of the RK3399. It should be easy enough to add drivers for other devices (e.g. the RK3328, RK3368, etc.) by passing the device details via driver_data. Unlike the kernel driver (using the nvmem subsystem), we don't expose the efuse as multiple named cells, but rather as a linear memory that can be read using misc_read(...). The primary use case (as of today) is the generation of a 'serial#' (and a 'cpuid#') environment variable for the RK3399-Q7 (Puma) system-on-module. Note that this adds a debug-only (i.e. only if DEBUG is defined) command 'rk3399_dump_efuses' that dumps the efuse block's content. N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to include a SoC-name (together with a comment in the function) to remind whoever adds support for additional SoCs that this function currently makes assumptions regarding the size of the fuse-box based on the RK3399. The hope is that the function is adjusted to reflect any changes resulting from generalising the driver for multiple SoCs and is then renamed. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-05 17:21:38 +00:00
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
misc: add driver for the Rockchip otp controller Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-25 15:57:49 +00:00
obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
misc: add driver for the SiFive otp controller Added a misc driver to handle OTP memory in SiFive SoCs. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-29 06:03:21 +00:00
obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
stm32mp1: add FUSE command support Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-17 13:24:06 +00:00
obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
drivers/misc: Share qbman init between archs This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-15 21:01:00 +00:00
obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
test: Move some test drivers into their own file At present several test drivers are part of the test file itself. Some of these are useful for of-platdata tests. Separate them out so we can use them for other things also. A few adjustments are needed so this driver can build for sandbox_spl as well. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-23 15:11:18 +00:00
obj-$(CONFIG_TEST_DRV) += test_drv.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
misc: Add support for the Arm Versatile Express config bus Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-28 12:43:31 +00:00
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
misc: Sort Makefile entries Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-04 07:00:53 +00:00
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
misc: Add JZ47xx efuse driver Add driver for the efuse block in the JZ47xx SOC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-16 22:25:19 +00:00
obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
misc: microchip_flexcom: introduce microchip_flexcom driver The Microchip Flexcom is just a wrapper which embeds a SPI controller, an I2C controller and an USART. Only one function can be used at a time and is chosen at boot time according to the device tree. The bindings are kept as in Linux. The driver registers to MISC_UCLASS. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-09 09:23:39 +00:00
obj-$(CONFIG_MICROCHIP_FLEXCOM) += microchip_flexcom.o
misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add a driver to support this feature for K3 line of SoCs, initially for AM65x. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-24 09:30:46 +00:00
obj-$(CONFIG_K3_AVS0) += k3_avs.o
misc: k3_esm: Add support for Texas Instruments K3 ESM driver The ESM (Error Signaling Module) is used to route error signals within the K3 SoCs somewhat similar to interrupts. The handling for these is different though, and can be routed for hardware error handling, to be handled by safety processor or just as error interrupts handled by the main processor. The u-boot level ESM driver is just used to configure the ESM signals so that they get routed to proper destination. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-02-14 09:18:15 +00:00
obj-$(CONFIG_ESM_K3) += k3_esm.o
misc: pmic_esm: Add support for PMIC ESM driver The ESM (Error Signal Monitor) is used on certain PMIC versions to handle error signals propagating from rest of the system. If these reach the PMIC, it is typically a last resort fatal error which requires a system reset. The ESM driver does the proper configuration for the ESM module to reach this end goal. Initially, only TPS65941 PMIC is supported for this. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-02-14 09:18:16 +00:00
obj-$(CONFIG_ESM_PMIC) += esm_pmic.o
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