powerpc/t1040qds: Add T1040QDS board
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
2013-09-12 05:41:28 +00:00
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Overview
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--------
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The T1040QDS is a Freescale reference board that hosts the T1040 SoC
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(and variants).
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T1040 SoC Overview
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------------------
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The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
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processor cores with high-performance data path acceleration architecture
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and network peripheral interfaces required for networking & telecommunications.
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The T1040/T1042 SoC includes the following function and features:
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- Four e5500 cores, each with a private 256 KB L2 cache
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- 256 KB shared L3 CoreNet platform cache (CPC)
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- Interconnect CoreNet platform
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- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
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support
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- Data Path Acceleration Architecture (DPAA) incorporating acceleration
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for the following functions:
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- Packet parsing, classification, and distribution
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- Queue management for scheduling, packet sequencing, and congestion
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management
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- Cryptography Acceleration (SEC 5.0)
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- RegEx Pattern Matching Acceleration (PME 2.2)
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- IEEE Std 1588 support
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- Hardware buffer management for buffer allocation and deallocation
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- Ethernet interfaces
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- Integrated 8-port Gigabit Ethernet switch (T1040 only)
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- Four 1 Gbps Ethernet controllers
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- Two RGMII interfaces or one RGMII and one MII interfaces
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- High speed peripheral interfaces
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- Four PCI Express 2.0 controllers running at up to 5 GHz
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- Two SATA controllers supporting 1.5 and 3.0 Gb/s operation
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- Upto two QSGMII interface
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- Upto six SGMII interface supporting 1000 Mbps
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- One SGMII interface supporting upto 2500 Mbps
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- Additional peripheral interfaces
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- Two USB 2.0 controllers with integrated PHY
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- SD/eSDHC/eMMC
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- eSPI controller
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- Four I2C controllers
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- Four UARTs
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- Four GPIO controllers
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- Integrated flash controller (IFC)
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- LCD and HDMI interface (DIU) with 12 bit dual data rate
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- TDM interface
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- Multicore programmable interrupt controller (PIC)
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- Two 8-channel DMA engines
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- Single source clocking implementation
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- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
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T1040QDS board Overview
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-----------------------
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- SERDES Connections, 8 lanes supporting:
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— PCI Express: supporting Gen 1 and Gen 2;
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— SGMII
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— QSGMII
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— SATA 2.0
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— Aurora debug with dedicated connectors (T1040 only)
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- DDR Controller
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- Supports rates of up to 1600 MHz data-rate
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- Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types.
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-IFC/Local Bus
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- NAND flash: 8-bit, async, up to 2GB.
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- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
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- GASIC: Simple (minimal) target within Qixis FPGA
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- PromJET rapid memory download support
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- Ethernet
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- Two on-board RGMII 10/100/1G ethernet ports.
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- PHY #0 remains powered up during deep-sleep (T1040 only)
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- QIXIS System Logic FPGA
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- Clocks
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- System and DDR clock (SYSCLK, “DDRCLK”)
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- SERDES clocks
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- Power Supplies
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- Video
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- DIU supports video at up to 1280x1024x32bpp
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- USB
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- Supports two USB 2.0 ports with integrated PHYs
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— Two type A ports with 5V@1.5A per port.
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— Second port can be converted to OTG mini-AB
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- SDHC
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- SDHC port connects directly to an adapter card slot, featuring:
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- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
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— Supporting eMMC memory devices
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- SPI
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- On-board support of 3 different devices and sizes
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- Other IO
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- Two Serial ports
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- ProfiBus port
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- Four I2C ports
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Memory map on T1040QDS
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----------------------
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The addresses in brackets are physical addresses.
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Start Address End Address Description Size
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0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
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0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
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0xF_FE00_0000 0xF_FEFF_FFFF CCSRBAR 16MB
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0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
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0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
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0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
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0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
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0xF_F600_0000 0xF_F7FF_FFFF Queue manager software portal 32MB
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0xF_F400_0000 0xF_F5FF_FFFF Buffer manager software portal 32MB
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0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
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0xF_E000_0000 0xF_E7FF_FFFF Promjet 128MB
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0xF_0000_0000 0xF_003F_FFFF DCSR 4MB
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0xC_3000_0000 0xC_3FFF_FFFF PCI Express 4 Mem Space 256MB
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0xC_2000_0000 0xC_2FFF_FFFF PCI Express 3 Mem Space 256MB
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0xC_1000_0000 0xC_1FFF_FFFF PCI Express 2 Mem Space 256MB
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0xC_0000_0000 0xC_0FFF_FFFF PCI Express 1 Mem Space 256MB
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0x0_0000_0000 0x0_ffff_ffff DDR 2GB
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NOR Flash memory Map on T1040QDS
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--------------------------------
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Start End Definition Size
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2016-02-06 03:30:11 +00:00
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0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
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0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
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2014-01-14 06:04:26 +00:00
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0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB
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2014-01-25 06:41:23 +00:00
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0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB
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0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB
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powerpc/t1040qds: Add T1040QDS board
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
2013-09-12 05:41:28 +00:00
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0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB
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0xEC000000 0xEC01FFFF RCW (alt bank) 128KB
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2016-02-06 03:30:11 +00:00
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0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB
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0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB
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2014-01-14 06:04:26 +00:00
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0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB
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2014-01-25 06:41:23 +00:00
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0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB
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powerpc/t1040qds: Add T1040QDS board
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
2013-09-12 05:41:28 +00:00
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0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 11MB + 512KB
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0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB
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0xE8000000 0xE801FFFF RCW (current bank) 128KB
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Various Software configurations/environment variables/commands
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--------------------------------------------------------------
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The below commands apply to T1040QDS
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2016-02-06 03:30:11 +00:00
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1. U-Boot environment variable hwconfig
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powerpc/t1040qds: Add T1040QDS board
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
2013-09-12 05:41:28 +00:00
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The default hwconfig is:
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hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:
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dr_mode=host,phy_type=utmi
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Note: For USB gadget set "dr_mode=peripheral"
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2. FMAN Ucode versions
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fsl_fman_ucode_t1040.bin
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3. Switching to alternate bank
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Commands for switching to alternate bank.
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1. To change from vbank0 to vbank4
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=> qixis_reset altbank (it will boot using vbank4)
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2.To change from vbank4 to vbank0
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=> qixis reset (it will boot using vbank0)
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T1040 Personality
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--------------------
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T1022 Personality
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--------------------
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T1022 is a reduced personality of T1040 with less core/clusters.
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T1042 Personality
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--------------------
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T1042 is a reduced personality of T1040 without Integrated 8-port Gigabit
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Ethernet switch. Rest of the blocks are same as T1040
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