u-boot/board/freescale/ls1046ardb/Makefile

#
# Copyright 2016 Freescale Semiconductor
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y += ddr.o
obj-y += ls1046ardb.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_NET) += eth.o
obj-y += cpld.o
endif
armv8: ls1046ardb: Add LS1046ARDB board support LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot SATA: * SerDes2 Lane3 to SATA port USB 3.0: one super speed USB 3.0 type A port one Micro-AB port UART: supports two UARTs up to 115200 bps for console Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 2016-09-07 10:47:28 +00:00			`#`
			`# Copyright 2016 Freescale Semiconductor`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`obj-y += ddr.o`
			`obj-y += ls1046ardb.o`
armv8: ls1046ardb: SPL size reduction Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 2017-03-30 04:23:13 +00:00			`ifndef CONFIG_SPL_BUILD`
armv8: ls1046ardb: Make NET independent of FMan This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com> 2017-04-25 15:39:51 +00:00			`obj-$(CONFIG_NET) += eth.o`
armv8: ls1046ardb: SPL size reduction Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 2017-03-30 04:23:13 +00:00			`obj-y += cpld.o`
			`endif`