2019-06-13 04:59:53 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
/*
|
|
|
|
* Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals
|
|
|
|
*
|
|
|
|
* Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
|
|
|
|
*/
|
|
|
|
|
|
|
|
&cbass_mcu_wakeup {
|
|
|
|
dmsc: dmsc@44083000 {
|
|
|
|
compatible = "ti,k2g-sci";
|
|
|
|
ti,host-id = <12>;
|
|
|
|
|
|
|
|
mbox-names = "rx", "tx";
|
|
|
|
|
|
|
|
mboxes= <&secure_proxy_main 11>,
|
|
|
|
<&secure_proxy_main 13>;
|
|
|
|
|
|
|
|
reg-names = "debug_messages";
|
|
|
|
reg = <0x00 0x44083000 0x0 0x1000>;
|
|
|
|
|
|
|
|
k3_pds: power-controller {
|
|
|
|
compatible = "ti,sci-pm-domain";
|
|
|
|
#power-domain-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
k3_clks: clocks {
|
|
|
|
compatible = "ti,k2g-sci-clk";
|
|
|
|
#clock-cells = <2>;
|
|
|
|
ti,scan-clocks-from-dt;
|
|
|
|
};
|
|
|
|
|
|
|
|
k3_reset: reset-controller {
|
|
|
|
compatible = "ti,sci-reset";
|
|
|
|
#reset-cells = <2>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
wkup_pmx0: pinmux@4301c000 {
|
|
|
|
compatible = "pinctrl-single";
|
|
|
|
/* Proxy 0 addressing */
|
|
|
|
reg = <0x00 0x4301c000 0x00 0x178>;
|
|
|
|
#pinctrl-cells = <1>;
|
|
|
|
pinctrl-single,register-width = <32>;
|
|
|
|
pinctrl-single,function-mask = <0xffffffff>;
|
|
|
|
};
|
|
|
|
|
|
|
|
wkup_uart0: serial@42300000 {
|
|
|
|
compatible = "ti,j721e-uart", "ti,am654-uart";
|
|
|
|
reg = <0x00 0x42300000 0x00 0x100>;
|
|
|
|
reg-shift = <2>;
|
|
|
|
reg-io-width = <4>;
|
|
|
|
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
clock-frequency = <48000000>;
|
|
|
|
current-speed = <115200>;
|
|
|
|
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
|
|
|
|
clocks = <&k3_clks 287 0>;
|
|
|
|
clock-names = "fclk";
|
|
|
|
};
|
|
|
|
|
|
|
|
mcu_uart0: serial@40a00000 {
|
|
|
|
compatible = "ti,j721e-uart", "ti,am654-uart";
|
|
|
|
reg = <0x00 0x40a00000 0x00 0x100>;
|
|
|
|
reg-shift = <2>;
|
|
|
|
reg-io-width = <4>;
|
|
|
|
interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
clock-frequency = <96000000>;
|
|
|
|
current-speed = <115200>;
|
|
|
|
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
|
|
|
|
clocks = <&k3_clks 149 0>;
|
|
|
|
clock-names = "fclk";
|
|
|
|
};
|
2019-09-04 10:31:37 +00:00
|
|
|
|
|
|
|
mcu_r5fss0: r5fss@41000000 {
|
|
|
|
compatible = "ti,j721e-r5fss";
|
|
|
|
lockstep-mode = <1>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
ranges = <0x41000000 0x00 0x41000000 0x20000>,
|
|
|
|
<0x41400000 0x00 0x41400000 0x20000>;
|
|
|
|
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
|
|
|
|
|
|
|
|
mcu_r5fss0_core0: r5f@41000000 {
|
|
|
|
compatible = "ti,j721e-r5f";
|
|
|
|
reg = <0x41000000 0x00008000>,
|
|
|
|
<0x41010000 0x00008000>;
|
|
|
|
reg-names = "atcm", "btcm";
|
|
|
|
ti,sci = <&dmsc>;
|
|
|
|
ti,sci-dev-id = <250>;
|
|
|
|
ti,sci-proc-ids = <0x01 0xFF>;
|
|
|
|
resets = <&k3_reset 250 1>;
|
|
|
|
atcm-enable = <1>;
|
|
|
|
btcm-enable = <1>;
|
|
|
|
loczrama = <1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcu_r5fss0_core1: r5f@41400000 {
|
|
|
|
compatible = "ti,j721e-r5f";
|
|
|
|
reg = <0x41400000 0x00008000>,
|
|
|
|
<0x41410000 0x00008000>;
|
|
|
|
reg-names = "atcm", "btcm";
|
|
|
|
ti,sci = <&dmsc>;
|
|
|
|
ti,sci-dev-id = <251>;
|
|
|
|
ti,sci-proc-ids = <0x02 0xFF>;
|
|
|
|
resets = <&k3_reset 251 1>;
|
|
|
|
atcm-enable = <1>;
|
|
|
|
btcm-enable = <1>;
|
|
|
|
loczrama = <1>;
|
|
|
|
};
|
|
|
|
};
|
2019-06-13 04:59:53 +00:00
|
|
|
};
|