2021-05-10 14:02:15 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP Z2-VSOM
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*
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2021-06-14 13:07:07 +00:00
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* (C) Copyright 2020 - 2021, Xilinx, Inc.
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2021-05-10 14:02:15 +00:00
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*
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* Michal Simek <michal.simek@xilinx.com>
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*/
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/* SD0 only supports 3.3V, no level shifter */
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&sdhci1 { /* FIXME - on CC - MIO 39 - 51 */
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status = "okay";
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no-1-8-v;
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disable-wp;
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broken-cd;
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xlnx,mio-bank = <1>;
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/* Do not run SD in HS mode from bootloader */
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sdhci-caps-mask = <0 0x200000>;
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sdhci-caps = <0 0>;
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max-frequency = <19000000>;
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};
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