u-boot/arch/m68k/dts/mcf5301x.dtsi

80 lines
1.5 KiB
Text
Raw Normal View History

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5301x";
aliases {
serial0 = &uart0;
spi0 = &dspi0;
fec0 = &fec0;
fec1 = &fec1;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
dspi0: dspi@fc05c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc05c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
fec0: ethernet@fc030000 {
compatible = "fsl,mcf-fec";
reg = <0xfc030000 0x200>;
mii-base = <0>;
max-speed = <100>;
phy-addr = <(-1)>;
timeout-loop = <50000>;
status = "disabled";
};
fec1: ethernet@fc034000 {
compatible = "fsl,mcf-fec";
reg = <0xfc034000 0x800>;
mii-base = <1>;
max-speed = <100>;
timeout-loop = <50000>;
status = "disabled";
};
i2c0: i2c@0xfc058000 {
compatible = "fsl-i2c";
#address-cells=<1>;
#size-cells=<0>;
cell-index = <0>;
reg = <0xfc058000 0x100>;
clock-frequency = <100000>;
status = "disabled";
};
};
};