u-boot/include/configs/xilinx_zynqmp_r5.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
 */

#ifndef __CONFIG_ZYNQMP_R5_H
#define __CONFIG_ZYNQMP_R5_H

#define CONFIG_EXTRA_ENV_SETTINGS

/* Serial drivers */
/* The following table includes the supported baudrates */
#define CFG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

/* Boot configuration */

#define CFG_SYS_INIT_RAM_ADDR	0xFFFF0000
#define CFG_SYS_INIT_RAM_SIZE	0x1000

/* Extend size of kernel image for uncompression */

#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-04-12 15:39:46 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`
			`/*`
			`* (C) Copyright 2018 Xilinx, Inc. (Michal Simek)`
			`*/`

			`#ifndef __CONFIG_ZYNQMP_R5_H`
			`#define __CONFIG_ZYNQMP_R5_H`

			`#define CONFIG_EXTRA_ENV_SETTINGS`

			`/* Serial drivers */`
			`/* The following table includes the supported baudrates */`
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2022-11-16 18:10:41 +00:00			`#define CFG_SYS_BAUDRATE_TABLE \`
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-04-12 15:39:46 +00:00			`{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}`

			`/* Boot configuration */`

global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2022-11-16 18:10:41 +00:00			`#define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000`
			`#define CFG_SYS_INIT_RAM_SIZE 0x1000`
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-04-12 15:39:46 +00:00
			`/* Extend size of kernel image for uncompression */`

			`#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */`