2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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/*
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2020-09-14 15:01:56 +00:00
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@com>
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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*/
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#ifndef __PINCTRL_H
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#define __PINCTRL_H
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2018-10-24 12:10:17 +00:00
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#define PINNAME_SIZE 10
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#define PINMUX_SIZE 40
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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/**
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* struct pinconf_param - pin config parameters
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2020-09-14 15:01:56 +00:00
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* @property: Property name in DT nodes
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* @param: ID for this config parameter
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* @default_value: default value for this config parameter used in case
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* no value is specified in DT nodes
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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*/
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struct pinconf_param {
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const char * const property;
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unsigned int param;
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u32 default_value;
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};
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/**
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* struct pinctrl_ops - pin control operations, to be implemented by
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* pin controller drivers.
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*
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2020-09-14 15:01:56 +00:00
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* set_state() is the only mandatory operation. You can implement your pinctrl
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* driver with its own @set_state. In this case, the other callbacks are not
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* required. Otherwise, generic pinctrl framework is also available; use
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* pinctrl_generic_set_state for @set_state, and implement other operations
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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* depending on your necessity.
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*/
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struct pinctrl_ops {
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2020-09-14 15:01:56 +00:00
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/**
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* @get_pins_count: Get the number of selectable pins
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*
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* @dev: Pinctrl device to use
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*
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* This function is necessary to parse the "pins" property in DTS.
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*
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* @Return:
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* number of selectable named pins available in this driver
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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int (*get_pins_count)(struct udevice *dev);
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2020-09-14 15:01:56 +00:00
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/**
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* @get_pin_name: Get the name of a pin
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*
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* @dev: Pinctrl device of the pin
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*
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* @selector: The pin selector
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*
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* This function is called by the core to figure out which pin it will
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* do operations to. This function is necessary to parse the "pins"
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* property in DTS.
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*
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* @Return: const pointer to the name of the pin
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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const char *(*get_pin_name)(struct udevice *dev, unsigned selector);
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2020-09-14 15:01:56 +00:00
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/**
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* @get_groups_count: Get the number of selectable groups
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*
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* @dev: Pinctrl device to use
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*
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* This function is necessary to parse the "groups" property in DTS.
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*
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* @Return:
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* number of selectable named groups available in the driver
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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int (*get_groups_count)(struct udevice *dev);
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2020-09-14 15:01:56 +00:00
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/**
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* @get_group_name: Get the name of a group
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*
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* @dev: Pinctrl device of the group
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*
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* @selector: The group selector
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*
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* This function is called by the core to figure out which group it
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* will do operations to. This function is necessary to parse the
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* "groups" property in DTS.
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*
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* @Return: Pointer to the name of the group
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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const char *(*get_group_name)(struct udevice *dev, unsigned selector);
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2020-09-14 15:01:56 +00:00
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/**
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* @get_functions_count: Get the number of selectable functions
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*
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* @dev: Pinctrl device to use
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*
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* This function is necessary for pin-muxing.
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*
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* @Return:
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* number of selectable named functions available in this driver
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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int (*get_functions_count)(struct udevice *dev);
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2020-09-14 15:01:56 +00:00
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/**
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* @get_function_name: Get the name of a function
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*
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* @dev: Pinmux device of the function
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*
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* @selector: The function selector
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*
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* This function is called by the core to figure out which mux setting
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* it will map a certain device to. This function is necessary for
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* pin-muxing.
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*
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* @Return:
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* Pointer to the function name of the muxing selector
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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const char *(*get_function_name)(struct udevice *dev,
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unsigned selector);
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2020-09-14 15:01:56 +00:00
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/**
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* @pinmux_set: Mux a pin to a function
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*
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* @dev: Pinctrl device to use
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*
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* @pin_selector: The pin selector
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*
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* @func_selector: The func selector
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*
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* On simple controllers one of @pin_selector or @func_selector may be
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* ignored. This function is necessary for pin-muxing against a single
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* pin.
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*
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* @Return: 0 if OK, or negative error code on failure
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*/
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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int (*pinmux_set)(struct udevice *dev, unsigned pin_selector,
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unsigned func_selector);
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2020-09-14 15:01:56 +00:00
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/**
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* @pinmux_group_set: Mux a group of pins to a function
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*
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* @dev: Pinctrl device to use
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*
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* @group_selector: The group selector
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*
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* @func_selector: The func selector
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*
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* On simple controllers one of @group_selector or @func_selector may be
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* ignored. This function is necessary for pin-muxing against a group of
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* pins.
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*
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* @Return: 0 if OK, or negative error code on failure
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*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector,
|
|
|
|
unsigned func_selector);
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @pinmux_property_set: Enable a pinmux group
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @pinmux_group: A u32 representing the pin identifier and mux
|
|
|
|
* settings. The exact format of a pinmux group is left
|
|
|
|
* up to the driver.
|
|
|
|
*
|
|
|
|
* Mux a single pin to a single function based on a driver-specific
|
|
|
|
* pinmux group. This function is necessary for parsing the "pinmux"
|
|
|
|
* property in DTS, and for pin-muxing against a pinmux group.
|
|
|
|
*
|
|
|
|
* @Return:
|
|
|
|
* Pin selector for the muxed pin if OK, or negative error code on
|
|
|
|
* failure
|
|
|
|
*/
|
pinctrl: Add pinmux property support to pinctrl-generic
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.
Support for the pinmux property is done differently than in Linux. As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.
This commit increases the size of the sandbox build by approximately 48
bytes. However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.
The documentation has been updated from the last Linux commit before it was
split off into yaml files.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-14 15:01:55 +00:00
|
|
|
int (*pinmux_property_set)(struct udevice *dev, u32 pinmux_group);
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @pinconf_num_params:
|
|
|
|
* Number of driver-specific parameters to be parsed from device
|
|
|
|
* trees. This member is necessary for pin configuration.
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
unsigned int pinconf_num_params;
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @pinconf_params:
|
|
|
|
* List of driver-specific parameters to be parsed from the device
|
|
|
|
* tree. This member is necessary for pin configuration.
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
const struct pinconf_param *pinconf_params;
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @pinconf_set: Configure an individual pin with a parameter
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @pin_selector: The pin selector
|
|
|
|
*
|
|
|
|
* @param: An &enum pin_config_param from @pinconf_params
|
|
|
|
*
|
|
|
|
* @argument: The argument to this param from the device tree, or
|
|
|
|
* @pinconf_params.default_value
|
|
|
|
*
|
|
|
|
* This function is necessary for pin configuration against a single
|
|
|
|
* pin.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
int (*pinconf_set)(struct udevice *dev, unsigned pin_selector,
|
|
|
|
unsigned param, unsigned argument);
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @pinconf_group_set: Configure all pins in a group with a parameter
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @pin_selector: The group selector
|
|
|
|
*
|
|
|
|
* @param: A &enum pin_config_param from
|
|
|
|
* @pinconf_params
|
|
|
|
*
|
|
|
|
* @argument: The argument to this param from the device tree, or
|
|
|
|
* @pinconf_params.default_value
|
|
|
|
*
|
|
|
|
* This function is necessary for pin configuration against a group of
|
|
|
|
* pins.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector,
|
|
|
|
unsigned param, unsigned argument);
|
2020-09-14 15:01:56 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @set_state: Configure a pinctrl device
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @config: Pseudo device pointing a config node
|
|
|
|
*
|
|
|
|
* This function is required to be implemented by all pinctrl drivers.
|
|
|
|
* Drivers may set this member to pinctrl_generic_set_state(), which
|
|
|
|
* will call other functions in &struct pinctrl_ops to parse
|
|
|
|
* @config.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
int (*set_state)(struct udevice *dev, struct udevice *config);
|
2015-08-30 22:55:13 +00:00
|
|
|
|
2020-09-14 15:01:56 +00:00
|
|
|
/**
|
|
|
|
* @set_state_simple: Configure a pinctrl device
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @config: Pseudo-device pointing a config node
|
|
|
|
*
|
|
|
|
* This function is usually a simpler version of set_state(). Only the
|
|
|
|
* first pinctrl device on the system is supported by this function.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
|
|
|
*/
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
int (*set_state_simple)(struct udevice *dev, struct udevice *periph);
|
2020-09-14 15:01:56 +00:00
|
|
|
|
2015-08-30 22:55:13 +00:00
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @request: Request a particular pinctrl function
|
|
|
|
*
|
|
|
|
* @dev: Device to adjust (%UCLASS_PINCTRL)
|
|
|
|
*
|
|
|
|
* @func: Function number (driver-specific)
|
2015-08-30 22:55:13 +00:00
|
|
|
*
|
|
|
|
* This activates the selected function.
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
2015-08-30 22:55:13 +00:00
|
|
|
*/
|
|
|
|
int (*request)(struct udevice *dev, int func, int flags);
|
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @get_periph_id: Get the peripheral ID for a device
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use for decoding
|
|
|
|
*
|
|
|
|
* @periph: Device to check
|
2015-08-30 22:55:13 +00:00
|
|
|
*
|
|
|
|
* This generally looks at the peripheral's device tree node to work
|
|
|
|
* out the peripheral ID. The return value is normally interpreted as
|
2020-09-14 15:01:56 +00:00
|
|
|
* &enum periph_id. so long as this is defined by the platform (which it
|
2015-08-30 22:55:13 +00:00
|
|
|
* should be).
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @Return:
|
|
|
|
* Peripheral ID of @periph, or %-ENOENT on error
|
2015-08-30 22:55:13 +00:00
|
|
|
*/
|
|
|
|
int (*get_periph_id)(struct udevice *dev, struct udevice *periph);
|
2016-01-22 02:43:56 +00:00
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @get_gpio_mux: Get the mux value for a particular GPIO
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @banknum: GPIO bank number
|
|
|
|
*
|
|
|
|
* @index: GPIO index within the bank
|
2016-01-22 02:43:56 +00:00
|
|
|
*
|
|
|
|
* This allows the raw mux value for a GPIO to be obtained. It is
|
|
|
|
* useful for displaying the function being used by that GPIO, such
|
|
|
|
* as with the 'gpio' command. This function is internal to the GPIO
|
|
|
|
* subsystem and should not be used by generic code. Typically it is
|
|
|
|
* used by a GPIO driver with knowledge of the SoC pinctrl setup.
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @Return:
|
|
|
|
* Mux value (SoC-specific, e.g. 0 for input, 1 for output)
|
2016-01-22 02:43:56 +00:00
|
|
|
*/
|
|
|
|
int (*get_gpio_mux)(struct udevice *dev, int banknum, int index);
|
2018-10-24 12:10:13 +00:00
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @get_pin_muxing: Show pin muxing
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @selector: Pin selector
|
|
|
|
*
|
|
|
|
* @buf: Buffer to fill with pin muxing description
|
|
|
|
*
|
|
|
|
* @size: Size of @buf
|
2018-10-24 12:10:13 +00:00
|
|
|
*
|
|
|
|
* This allows to display the muxing of a given pin. It's useful for
|
2020-09-14 15:01:56 +00:00
|
|
|
* debug purposes to know if a pin is configured as GPIO or as an
|
|
|
|
* alternate function and which one. Typically it is used by a PINCTRL
|
|
|
|
* driver with knowledge of the SoC pinctrl setup.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
2018-10-24 12:10:13 +00:00
|
|
|
*/
|
|
|
|
int (*get_pin_muxing)(struct udevice *dev, unsigned int selector,
|
|
|
|
char *buf, int size);
|
2019-04-21 21:57:23 +00:00
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @gpio_request_enable: Request and enable GPIO on a certain pin.
|
|
|
|
*
|
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @selector: Pin selector
|
|
|
|
*
|
|
|
|
* Implement this only if you can mux every pin individually as GPIO.
|
|
|
|
* The affected GPIO range is passed along with an offset(pin number)
|
|
|
|
* into that specific GPIO range - function selectors and pin groups are
|
|
|
|
* orthogonal to this, the core will however make sure the pins do not
|
|
|
|
* collide.
|
2019-04-21 21:57:23 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @Return:
|
|
|
|
* 0 if OK, or negative error code on failure
|
2019-04-21 21:57:23 +00:00
|
|
|
*/
|
|
|
|
int (*gpio_request_enable)(struct udevice *dev, unsigned int selector);
|
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* @gpio_disable_free: Free up GPIO muxing on a certain pin.
|
2019-04-21 21:57:23 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
*
|
|
|
|
* @selector: Pin selector
|
|
|
|
*
|
|
|
|
* This function is the reverse of @gpio_request_enable.
|
|
|
|
*
|
|
|
|
* @Return: 0 if OK, or negative error code on failure
|
2019-04-21 21:57:23 +00:00
|
|
|
*/
|
|
|
|
int (*gpio_disable_free)(struct udevice *dev, unsigned int selector);
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#define pinctrl_get_ops(dev) ((struct pinctrl_ops *)(dev)->driver->ops)
|
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* enum pin_config_param - Generic pin configuration parameters
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_BUS_HOLD: The pin will be set to weakly latch so that it
|
2018-01-05 06:05:17 +00:00
|
|
|
* weakly drives the last value on a tristate bus, also known as a "bus
|
|
|
|
* holder", "bus keeper" or "repeater". This allows another device on the
|
|
|
|
* bus to change the value by driving the bus high or low and switching to
|
|
|
|
* tristate. The argument is ignored.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_DISABLE: Disable any pin bias on the pin, a
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* transition from say pull-up to pull-down implies that you disable
|
|
|
|
* pull-up in the process, this setting disables all biasing.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: The pin will be set to a high impedance
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* mode, also know as "third-state" (tristate) or "high-Z" or "floating".
|
|
|
|
* On output pins this effectively disconnects the pin, which is useful
|
|
|
|
* if for example some other pin is going to drive the signal connected
|
|
|
|
* to it for a while. Pins used for input are usually always high
|
|
|
|
* impedance.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_PULL_DOWN: The pin will be pulled down (usually with high
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* impedance to GROUND). If the argument is != 0 pull-down is enabled,
|
|
|
|
* if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: The pin will be pulled up or down based
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* on embedded knowledge of the controller hardware, like current mux
|
|
|
|
* function. The pull direction and possibly strength too will normally
|
|
|
|
* be decided completely inside the hardware block and not be readable
|
|
|
|
* from the kernel side.
|
|
|
|
* If the argument is != 0 pull up/down is enabled, if it is 0, the
|
|
|
|
* configuration is ignored. The proper way to disable it is to use
|
|
|
|
* @PIN_CONFIG_BIAS_DISABLE.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_BIAS_PULL_UP: The pin will be pulled up (usually with high
|
2018-01-05 06:05:17 +00:00
|
|
|
* impedance to VDD). If the argument is != 0 pull-up is enabled,
|
|
|
|
* if it is 0, pull-up is total, i.e. the pin is connected to VDD.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_DRIVE_OPEN_DRAIN: The pin will be driven with open drain (open
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* collector) which means it is usually wired with other output ports
|
|
|
|
* which are then pulled up with an external resistor. Setting this
|
|
|
|
* config will enable open drain mode, the argument is ignored.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_DRIVE_OPEN_SOURCE: The pin will be driven with open source
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* (open emitter). Setting this config will enable open source mode, the
|
|
|
|
* argument is ignored.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_DRIVE_PUSH_PULL: The pin will be driven actively high and
|
2018-01-05 06:05:17 +00:00
|
|
|
* low, this is the most typical case and is typically achieved with two
|
|
|
|
* active transistors on the output. Setting this config will enable
|
|
|
|
* push-pull mode, the argument is ignored.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_DRIVE_STRENGTH: The pin will sink or source at most the current
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* passed as argument. The argument is in mA.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_DRIVE_STRENGTH_UA: The pin will sink or source at most the
|
|
|
|
* current passed as argument. The argument is in uA.
|
|
|
|
* @PIN_CONFIG_INPUT_DEBOUNCE: This will configure the pin to debounce mode,
|
2018-01-05 06:05:17 +00:00
|
|
|
* which means it will wait for signals to settle when reading inputs. The
|
|
|
|
* argument gives the debounce time in usecs. Setting the
|
|
|
|
* argument to zero turns debouncing off.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_INPUT_ENABLE: Enable the pin's input. Note that this does not
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* affect the pin's ability to drive output. 1 enables input, 0 disables
|
|
|
|
* input.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_INPUT_SCHMITT: This will configure an input pin to run in
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
|
|
|
|
* the threshold value is given on a custom format as argument when
|
|
|
|
* setting pins to this mode.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_INPUT_SCHMITT_ENABLE: Control schmitt-trigger mode on the pin.
|
2018-01-05 06:05:17 +00:00
|
|
|
* If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
|
|
|
|
* schmitt-trigger mode is disabled.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_LOW_POWER_MODE: This will configure the pin for low power
|
2018-01-05 06:05:17 +00:00
|
|
|
* operation, if several modes of operation are supported these can be
|
|
|
|
* passed in the argument on a custom form, else just use argument 1
|
|
|
|
* to indicate low power mode, argument 0 turns low power mode off.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_OUTPUT_ENABLE: This will enable the pin's output mode
|
2018-01-05 06:05:17 +00:00
|
|
|
* without driving a value there. For most platforms this reduces to
|
|
|
|
* enable the output buffers and then let the pin controller current
|
|
|
|
* configuration (eg. the currently selected mux function) drive values on
|
|
|
|
* the line. Use argument 1 to enable output mode, argument 0 to disable
|
|
|
|
* it.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_OUTPUT: This will configure the pin as an output and drive a
|
2018-01-05 06:05:17 +00:00
|
|
|
* value on the line. Use argument 1 to indicate high level, argument 0 to
|
|
|
|
* indicate low level. (Please see Documentation/driver-api/pinctl.rst,
|
|
|
|
* section "GPIO mode pitfalls" for a discussion around this parameter.)
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_POWER_SOURCE: If the pin can select between different power
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* supplies, the argument to this parameter (on a custom format) tells
|
|
|
|
* the driver which alternative power source to use.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_SLEEP_HARDWARE_STATE: Indicate this is sleep related state.
|
|
|
|
* @PIN_CONFIG_SLEW_RATE: If the pin can select slew rate, the argument to
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* this parameter (on a custom format) tells the driver which alternative
|
|
|
|
* slew rate to use.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_SKEW_DELAY: If the pin has programmable skew rate (on inputs)
|
2018-01-05 06:05:17 +00:00
|
|
|
* or latch delay (on outputs) this parameter (in a custom format)
|
|
|
|
* specifies the clock skew or latch delay. It typically controls how
|
|
|
|
* many double inverters are put in front of the line.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_END: This is the last enumerator for pin configurations, if
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* you need to pass in custom configurations to the pin controller, use
|
|
|
|
* PIN_CONFIG_END+1 as the base offset.
|
2020-09-14 15:01:56 +00:00
|
|
|
* @PIN_CONFIG_MAX: This is the maximum configuration value that can be
|
2018-01-05 06:05:17 +00:00
|
|
|
* presented using the packed format.
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
*/
|
2018-01-05 06:05:17 +00:00
|
|
|
enum pin_config_param {
|
|
|
|
PIN_CONFIG_BIAS_BUS_HOLD,
|
|
|
|
PIN_CONFIG_BIAS_DISABLE,
|
|
|
|
PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
|
|
|
|
PIN_CONFIG_BIAS_PULL_DOWN,
|
|
|
|
PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
|
|
|
|
PIN_CONFIG_BIAS_PULL_UP,
|
|
|
|
PIN_CONFIG_DRIVE_OPEN_DRAIN,
|
|
|
|
PIN_CONFIG_DRIVE_OPEN_SOURCE,
|
|
|
|
PIN_CONFIG_DRIVE_PUSH_PULL,
|
|
|
|
PIN_CONFIG_DRIVE_STRENGTH,
|
2019-06-04 11:53:06 +00:00
|
|
|
PIN_CONFIG_DRIVE_STRENGTH_UA,
|
2018-01-05 06:05:17 +00:00
|
|
|
PIN_CONFIG_INPUT_DEBOUNCE,
|
|
|
|
PIN_CONFIG_INPUT_ENABLE,
|
|
|
|
PIN_CONFIG_INPUT_SCHMITT,
|
|
|
|
PIN_CONFIG_INPUT_SCHMITT_ENABLE,
|
|
|
|
PIN_CONFIG_LOW_POWER_MODE,
|
|
|
|
PIN_CONFIG_OUTPUT_ENABLE,
|
|
|
|
PIN_CONFIG_OUTPUT,
|
|
|
|
PIN_CONFIG_POWER_SOURCE,
|
|
|
|
PIN_CONFIG_SLEEP_HARDWARE_STATE,
|
|
|
|
PIN_CONFIG_SLEW_RATE,
|
|
|
|
PIN_CONFIG_SKEW_DELAY,
|
|
|
|
PIN_CONFIG_END = 0x7F,
|
|
|
|
PIN_CONFIG_MAX = 0xFF,
|
|
|
|
};
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
|
|
|
|
#if CONFIG_IS_ENABLED(PINCTRL_GENERIC)
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_generic_set_state() - Generic set_state operation
|
|
|
|
* @pctldev: Pinctrl device to use
|
|
|
|
* @config: Config device (pseudo device), pointing a config node in DTS
|
|
|
|
*
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
* Parse the DT node of @config and its children and handle generic properties
|
|
|
|
* such as "pins", "groups", "functions", and pin configuration parameters.
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 on success, or negative error code on failure
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config);
|
|
|
|
#else
|
|
|
|
static inline int pinctrl_generic_set_state(struct udevice *pctldev,
|
|
|
|
struct udevice *config)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if CONFIG_IS_ENABLED(PINCTRL)
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_select_state() - Set a device to a given state
|
|
|
|
* @dev: Peripheral device
|
|
|
|
* @statename: State name, like "default"
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 on success, or negative error code on failure
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_select_state(struct udevice *dev, const char *statename);
|
|
|
|
#else
|
|
|
|
static inline int pinctrl_select_state(struct udevice *dev,
|
|
|
|
const char *statename)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-08-30 22:55:13 +00:00
|
|
|
/**
|
|
|
|
* pinctrl_request() - Request a particular pinctrl function
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
2015-08-30 22:55:13 +00:00
|
|
|
* @func: Function number (driver-specific)
|
|
|
|
* @flags: Flags (driver-specific)
|
2020-09-14 15:01:56 +00:00
|
|
|
*
|
|
|
|
* Return: 0 if OK, or negative error code on failure
|
2015-08-30 22:55:13 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_request(struct udevice *dev, int func, int flags);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pinctrl_request_noflags() - Request a particular pinctrl function
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
* @func: Function number (driver-specific)
|
2015-08-30 22:55:13 +00:00
|
|
|
*
|
|
|
|
* This is similar to pinctrl_request() but uses 0 for @flags.
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 if OK, or negative error code on failure
|
2015-08-30 22:55:13 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_request_noflags(struct udevice *dev, int func);
|
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_get_periph_id() - Get the peripheral ID for a device
|
|
|
|
* @dev: Pinctrl device to use for decoding
|
|
|
|
* @periph: Device to check
|
2015-08-30 22:55:13 +00:00
|
|
|
*
|
|
|
|
* This generally looks at the peripheral's device tree node to work out the
|
|
|
|
* peripheral ID. The return value is normally interpreted as enum periph_id.
|
|
|
|
* so long as this is defined by the platform (which it should be).
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: Peripheral ID of @periph, or -ENOENT on error
|
2015-08-30 22:55:13 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph);
|
|
|
|
|
2016-01-22 02:43:56 +00:00
|
|
|
/**
|
|
|
|
* pinctrl_get_gpio_mux() - get the mux value for a particular GPIO
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
* @banknum: GPIO bank number
|
|
|
|
* @index: GPIO index within the bank
|
2016-01-22 02:43:56 +00:00
|
|
|
*
|
|
|
|
* This allows the raw mux value for a GPIO to be obtained. It is
|
|
|
|
* useful for displaying the function being used by that GPIO, such
|
|
|
|
* as with the 'gpio' command. This function is internal to the GPIO
|
|
|
|
* subsystem and should not be used by generic code. Typically it is
|
|
|
|
* used by a GPIO driver with knowledge of the SoC pinctrl setup.
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: Mux value (SoC-specific, e.g. 0 for input, 1 for output)
|
2016-01-22 02:43:56 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index);
|
|
|
|
|
2018-10-24 12:10:13 +00:00
|
|
|
/**
|
|
|
|
* pinctrl_get_pin_muxing() - Returns the muxing description
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
* @selector: Pin index within pin-controller
|
|
|
|
* @buf: Pin's muxing description
|
|
|
|
* @size: Pin's muxing description length
|
2018-10-24 12:10:13 +00:00
|
|
|
*
|
|
|
|
* This allows to display the muxing description of the given pin for
|
|
|
|
* debug purpose
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 if OK, or negative error code on failure
|
2018-10-24 12:10:13 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf,
|
|
|
|
int size);
|
|
|
|
|
2018-10-24 12:10:14 +00:00
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_get_pins_count() - Display pin-controller pins number
|
|
|
|
* @dev: Pinctrl device to use
|
2018-10-24 12:10:14 +00:00
|
|
|
*
|
|
|
|
* This allows to know the number of pins owned by a given pin-controller
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: Number of pins if OK, or negative error code on failure
|
2018-10-24 12:10:14 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_get_pins_count(struct udevice *dev);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pinctrl_get_pin_name() - Returns the pin's name
|
2020-09-14 15:01:56 +00:00
|
|
|
* @dev: Pinctrl device to use
|
|
|
|
* @selector: Pin index within pin-controller
|
|
|
|
* @buf: Buffer to fill with the name of the pin
|
|
|
|
* @size: Size of @buf
|
2018-10-24 12:10:14 +00:00
|
|
|
*
|
|
|
|
* This allows to display the pin's name for debug purpose
|
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 if OK, or negative error code on failure
|
2018-10-24 12:10:14 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf,
|
|
|
|
int size);
|
2019-04-21 21:57:23 +00:00
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_gpio_request() - Request a single pin to be used as GPIO
|
|
|
|
* @dev: GPIO peripheral device
|
|
|
|
* @offset: GPIO pin offset from the GPIO controller
|
2019-04-21 21:57:23 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 on success, or negative error code on failure
|
2019-04-21 21:57:23 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_gpio_request(struct udevice *dev, unsigned offset);
|
|
|
|
|
|
|
|
/**
|
2020-09-14 15:01:56 +00:00
|
|
|
* pinctrl_gpio_free() - Free a single pin used as GPIO
|
|
|
|
* @dev: GPIO peripheral device
|
|
|
|
* @offset: GPIO pin offset from the GPIO controller
|
2019-04-21 21:57:23 +00:00
|
|
|
*
|
2020-09-14 15:01:56 +00:00
|
|
|
* Return: 0 on success, or negative error code on failure
|
2019-04-21 21:57:23 +00:00
|
|
|
*/
|
|
|
|
int pinctrl_gpio_free(struct udevice *dev, unsigned offset);
|
|
|
|
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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#endif /* __PINCTRL_H */
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