2008-01-30 21:15:54 +00:00
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/*
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* (C) Copyright 2006
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2008-05-08 20:52:09 +00:00
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* DENX Software Engineering <mk@denx.de>
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2008-01-30 21:15:54 +00:00
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2008-01-30 21:15:54 +00:00
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*/
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#include <common.h>
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2008-10-16 13:01:15 +00:00
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
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2008-01-30 21:15:54 +00:00
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2010-11-07 12:26:14 +00:00
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#include <asm/io.h>
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2008-01-30 21:15:54 +00:00
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#include <asm/arch/hardware.h>
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2008-03-26 19:52:32 +00:00
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#include <asm/arch/at91_pmc.h>
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2009-04-16 19:30:44 +00:00
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#include <asm/arch/clk.h>
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2008-01-30 21:15:54 +00:00
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int usb_cpu_init(void)
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{
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2010-11-03 14:47:20 +00:00
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at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
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2008-11-08 23:14:46 +00:00
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2013-10-21 08:14:00 +00:00
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#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
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2008-11-08 23:14:46 +00:00
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/* Enable PLLB */
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2010-03-25 13:30:13 +00:00
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writel(get_pllb_init(), &pmc->pllbr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
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2008-11-08 23:14:46 +00:00
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;
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2013-10-21 08:13:59 +00:00
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#ifdef CONFIG_AT91SAM9N12
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writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb);
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#endif
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2013-10-21 08:14:00 +00:00
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#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
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2010-06-09 19:09:06 +00:00
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/* Enable UPLL */
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writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
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&pmc->uckr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
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;
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/* Select PLLA as input clock of OHCI */
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writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
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2008-11-08 23:14:46 +00:00
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#endif
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2008-01-30 21:15:54 +00:00
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/* Enable USB host clock. */
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2014-08-06 09:24:56 +00:00
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#ifdef CPU_HAS_PCR
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at91_periph_clk_enable(ATMEL_ID_UHP);
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2013-05-12 22:40:53 +00:00
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#else
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2010-11-03 14:47:20 +00:00
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writel(1 << ATMEL_ID_UHP, &pmc->pcer);
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2013-05-12 22:40:53 +00:00
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#endif
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2013-04-17 00:09:51 +00:00
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#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
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2010-11-03 14:47:20 +00:00
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writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
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2008-05-08 18:52:22 +00:00
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#else
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2010-11-03 14:47:20 +00:00
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writel(ATMEL_PMC_UHP, &pmc->scer);
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2008-05-08 18:52:22 +00:00
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#endif
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2008-01-30 21:15:54 +00:00
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return 0;
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}
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int usb_cpu_stop(void)
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{
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2010-11-03 14:47:20 +00:00
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at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
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2010-03-25 13:30:13 +00:00
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2008-01-30 21:15:54 +00:00
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/* Disable USB host clock. */
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2014-08-06 09:24:56 +00:00
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#ifdef CPU_HAS_PCR
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at91_periph_clk_disable(ATMEL_ID_UHP);
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2013-05-12 22:40:53 +00:00
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#else
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2010-11-03 14:47:20 +00:00
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writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
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2013-05-12 22:40:53 +00:00
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#endif
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2013-04-17 00:09:51 +00:00
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#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
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2010-11-03 14:47:20 +00:00
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writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
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2008-05-08 18:52:22 +00:00
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#else
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2010-11-03 14:47:20 +00:00
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writel(ATMEL_PMC_UHP, &pmc->scdr);
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2008-05-08 18:52:22 +00:00
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#endif
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2008-11-08 23:14:46 +00:00
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2013-10-21 08:14:00 +00:00
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#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
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2013-10-21 08:13:59 +00:00
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#ifdef CONFIG_AT91SAM9N12
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writel(0, &pmc->usb);
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#endif
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2008-11-08 23:14:46 +00:00
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/* Disable PLLB */
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2010-03-25 13:30:13 +00:00
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writel(0, &pmc->pllbr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
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2008-11-08 23:14:46 +00:00
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;
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2013-10-21 08:14:00 +00:00
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#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
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2010-06-09 19:09:06 +00:00
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/* Disable UPLL */
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writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
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;
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2008-11-08 23:14:46 +00:00
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#endif
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2008-01-30 21:15:54 +00:00
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return 0;
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}
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int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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2008-10-16 13:01:15 +00:00
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#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
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