2010-04-01 15:49:42 +00:00
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/**
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2011-01-21 22:03:57 +00:00
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* Copyright 2010-2011 Freescale Semiconductor
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2010-04-01 15:49:42 +00:00
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* Author: Timur Tabi <timur@freescale.com>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2010-04-01 15:49:42 +00:00
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*
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* This file provides support for the ngPIXIS, a board-specific FPGA used on
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* some Freescale reference boards.
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*/
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/* ngPIXIS register set. Hopefully, this won't change too much over time.
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* Feel free to add board-specific #ifdefs where necessary.
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*/
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typedef struct ngpixis {
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u8 id;
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u8 arch;
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u8 scver;
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u8 csr;
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u8 rst;
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2011-02-09 02:00:08 +00:00
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u8 serclk;
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2010-04-01 15:49:42 +00:00
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u8 aux;
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u8 spd;
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u8 brdcfg0;
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2010-05-20 16:16:16 +00:00
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u8 brdcfg1; /* On some boards, this register is called 'dma' */
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2010-04-01 15:49:42 +00:00
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u8 addr;
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2011-02-09 02:00:08 +00:00
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u8 brdcfg2;
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u8 gpiodir;
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2010-04-01 15:49:42 +00:00
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u8 data;
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u8 led;
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2011-02-09 02:00:08 +00:00
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u8 tag;
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2010-04-01 15:49:42 +00:00
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u8 vctl;
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u8 vstat;
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u8 vcfgen0;
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u8 res4;
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u8 ocmcsr;
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u8 ocmmsg;
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u8 gmdbg;
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u8 res5[2];
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u8 sclk[3];
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u8 dclk[3];
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u8 watch;
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struct {
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u8 sw;
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u8 en;
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2012-10-23 09:40:22 +00:00
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} s[9]; /* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */
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2010-05-22 22:25:47 +00:00
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} __attribute__ ((packed)) ngpixis_t;
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2010-04-01 15:49:42 +00:00
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/* Pointer to the PIXIS register set */
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#define pixis ((ngpixis_t *)PIXIS_BASE)
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/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */
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#define PIXIS_SW(x) (pixis->s[(x) - 1].sw)
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/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
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#define PIXIS_EN(x) (pixis->s[(x) - 1].en)
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2011-01-21 22:03:57 +00:00
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u8 pixis_read(unsigned int reg);
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void pixis_write(unsigned int reg, u8 value);
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#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
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#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)
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