2018-12-16 22:25:22 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* JZ4780 common routines
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*
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* Copyright (c) 2013 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2018-12-16 22:25:22 +00:00
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#include <mach/jz4780.h>
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/* WDT */
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#define WDT_TDR 0x00
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#define WDT_TCER 0x04
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#define WDT_TCNT 0x08
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#define WDT_TCSR 0x0C
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/* Register definition */
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#define WDT_TCSR_PRESCALE_BIT 3
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#define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT)
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#define WDT_TCSR_EXT_EN BIT(2)
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#define WDT_TCSR_RTC_EN BIT(1)
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#define WDT_TCSR_PCK_EN BIT(0)
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#define WDT_TCER_TCEN BIT(0)
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void _machine_restart(void)
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{
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void __iomem *wdt_regs = (void __iomem *)WDT_BASE;
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/* EXTAL as the timer clock input. */
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writew(WDT_TCSR_PRESCALE1 | WDT_TCSR_EXT_EN, wdt_regs + WDT_TCSR);
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/* Reset the WDT counter and timeout. */
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writew(0, wdt_regs + WDT_TCNT);
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writew(0, wdt_regs + WDT_TDR);
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jz4780_tcu_wdt_start();
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/* WDT start */
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writeb(WDT_TCER_TCEN, wdt_regs + WDT_TCER);
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for (;;)
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;
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}
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