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u-boot/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds

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configs: ast2600: Move SPL bss section to DRAM space The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the hash output buffer at the .bss section. However, AST2600 by default executes SPL in the NOR flash XIP way. This results in the hash output cannot be written to the buffer as it is located at the R/X only region. We need to move the .bss section out of the SPL body to the DRAM space, where hash output can be written to. This patch includes: - Define the .bss section base and size - A new SPL linker script is added with a separate .bss region specified - Enable CONFIG_SPL_SEPARATE_BSS kconfig option Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
2022-06-01 08:21:15 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* (C) Copyright 2022
* Chia-Wei Wang <chiawei_wang@aspeedtech.com>
*/
MEMORY { .nor : ORIGIN = CONFIG_SPL_TEXT_BASE,
LENGTH = CONFIG_SPL_SIZE_LIMIT }
MEMORY { .bss : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
__image_copy_start = .;
*(.vectors)
CPUDIR/start.o (.text*)
*(.text*)
*(.glue*)
} > .nor
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } > .nor
. = ALIGN(4);
.data : {
*(.data*)
} > .nor
. = ALIGN(4);
aspeed/ast2600: Fix SPL linker script The commit 99e2fbcb69f0 ("linker_lists: Rename sections to remove . prefix") changed the name of the linker list sections. As the Aspeed SPL linker wasn't in the tree yet, it missed the change. This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which Aspeed was copied from. Fixes: 442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space") Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-06-28 04:27:25 +00:00
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
configs: ast2600: Move SPL bss section to DRAM space The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the hash output buffer at the .bss section. However, AST2600 by default executes SPL in the NOR flash XIP way. This results in the hash output cannot be written to the buffer as it is located at the R/X only region. We need to move the .bss section out of the SPL body to the DRAM space, where hash output can be written to. This patch includes: - Define the .bss section base and size - A new SPL linker script is added with a separate .bss region specified - Enable CONFIG_SPL_SEPARATE_BSS kconfig option Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
2022-06-01 08:21:15 +00:00
} > .nor
. = ALIGN(4);
.binman_sym_table : {
__binman_sym_start = .;
KEEP(*(SORT(.binman_sym*)));
__binman_sym_end = .;
} > .nor
. = ALIGN(4);
__image_copy_end = .;
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
} > .nor
.end :
{
*(.__end)
} > .nor
_image_binary_end = .;
aspeed/spl: Remove OVERLAY from linker script The generic arm linker script contains this section: .bss __rel_dyn_start (OVERLAY) : { ... } The (OVERLAY) syntax in the description causes the .bss section to be included in the NOR area of the image: $ objdump -t -j .bss spl/u-boot-spl SYMBOL TABLE: 0000c61c l d .bss 00000000 .bss 0000c640 l O .bss 00000040 __value.0 0000c68c g O .bss 00000000 __bss_end 0000c61c g O .bss 00000000 __bss_start 0000c680 g O .bss 0000000c stdio_devices This is what the custom linker script tries to avoid, as the NOR area is read-only. Remove the OVERLAY syntax to fix the BSS location: $ objdump -t -j .bss spl/u-boot-spl SYMBOL TABLE: 83000000 l d .bss 00000000 .bss 83000000 l O .bss 00000040 __value.0 0000c61c g O .bss 00000000 __image_copy_end 8300004c g O .bss 00000000 __bss_end 83000000 g O .bss 00000000 __bss_start 83000040 g O .bss 0000000c stdio_devices This restores the state of the linker script before the patch that fixed the linker lists issue. Fixes: f6810b749f2e ("aspeed/ast2600: Fix SPL linker script") Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-06-29 07:05:24 +00:00
.bss : {
configs: ast2600: Move SPL bss section to DRAM space The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the hash output buffer at the .bss section. However, AST2600 by default executes SPL in the NOR flash XIP way. This results in the hash output cannot be written to the buffer as it is located at the R/X only region. We need to move the .bss section out of the SPL body to the DRAM space, where hash output can be written to. This patch includes: - Define the .bss section base and size - A new SPL linker script is added with a separate .bss region specified - Enable CONFIG_SPL_SEPARATE_BSS kconfig option Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
2022-06-01 08:21:15 +00:00
__bss_start = .;
*(.bss*)
. = ALIGN(4);
__bss_end = .;
} > .bss
__bss_size = __bss_end - __bss_start;
}
#if defined(IMAGE_MAX_SIZE)
ASSERT(__image_copy_end - __image_copy_start <= (IMAGE_MAX_SIZE), \
"SPL image too big");
#endif
#if defined(CONFIG_SPL_BSS_MAX_SIZE)
ASSERT(__bss_end - __bss_start <= (CONFIG_SPL_BSS_MAX_SIZE), \
"SPL image BSS too big");
#endif
#if defined(CONFIG_SPL_MAX_FOOTPRINT)
ASSERT(__bss_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \
"SPL image plus BSS too big");
#endif
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